From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38819) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHoyT-0000Cv-FP for qemu-devel@nongnu.org; Wed, 31 Oct 2018 07:47:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gHoyQ-0007X8-8x for qemu-devel@nongnu.org; Wed, 31 Oct 2018 07:47:49 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:40049) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gHoyP-0007A6-Uf for qemu-devel@nongnu.org; Wed, 31 Oct 2018 07:47:46 -0400 Received: by mail-wr1-x444.google.com with SMTP id i17-v6so16081376wre.7 for ; Wed, 31 Oct 2018 04:47:25 -0700 (PDT) References: <20181025144644.15464-1-cota@braap.org> <20181025144644.15464-13-cota@braap.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <20181025144644.15464-13-cota@braap.org> Date: Wed, 31 Oct 2018 11:47:22 +0000 Message-ID: <87efc68hit.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC v4 13/71] microblaze: convert to helper_cpu_halted_set List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Emilio G. Cota" Cc: qemu-devel@nongnu.org, Paolo Bonzini , Richard Henderson , "Edgar E. Iglesias" Emilio G. Cota writes: > Cc: "Edgar E. Iglesias" > Signed-off-by: Emilio G. Cota Reviewed-by: Alex Benn=C3=A9e > --- > target/microblaze/translate.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c > index 78ca265b04..008b84d456 100644 > --- a/target/microblaze/translate.c > +++ b/target/microblaze/translate.c > @@ -1233,9 +1233,7 @@ static void dec_br(DisasContext *dc) > LOG_DIS("sleep\n"); > > t_sync_flags(dc); > - tcg_gen_st_i32(tmp_1, cpu_env, > - -offsetof(MicroBlazeCPU, env) > - +offsetof(CPUState, halted)); > + gen_helper_cpu_halted_set(cpu_env, tmp_1); > tcg_gen_movi_i64(cpu_SR[SR_PC], dc->pc + 4); > gen_helper_raise_exception(cpu_env, tmp_hlt); > tcg_temp_free_i32(tmp_hlt); -- Alex Benn=C3=A9e