From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: Pranith Kumar <bobby.prani@gmail.com>,
Claudio Fontana <claudio.fontana@huawei.com>,
"open list:AArch64 target" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
serge.fdrv@gmail.com, Claudio Fontana <claudio.fontana@gmail.com>
Subject: Re: [Qemu-devel] [RFC v3 PATCH 03/14] tcg/aarch64: Add support for fence
Date: Thu, 23 Jun 2016 20:58:06 +0100 [thread overview]
Message-ID: <87eg7nr835.fsf@linaro.org> (raw)
In-Reply-To: <e10ebfad-354c-a476-7114-17f500551369@twiddle.net>
Richard Henderson <rth@twiddle.net> writes:
> On 06/23/2016 09:18 AM, Alex Bennée wrote:
>>> > + /* System instructions. */
>>> > + DMB_ISH = 0xd50338bf,
>> As ISH is part of the CRm encoding I wonder if this should be split into
>> the main DMB encoding (0xd50330bf) and a separate set of CRm defines.
>>
>> In fact the documentation of the struct above implies you should
>> probably have:
>>
>> I6260_DMB = 0xd50330bf,
>>
>> And then:
>>
>> static void tcg_out_insn_6260(TCGContext *s, AArch64Insn insn, int crm);
>> {
>> tcg_out32(s, insn | (crm & 0xf) << 8);
>> }
>
> I don't see any benefit to doing this over or-ing in the pre-shifted
> values.
I'm mainly thinking about keeping in line with the layout of the rest of
the code. I would home the compiler would generate the same either way!
--
Alex Bennée
next prev parent reply other threads:[~2016-06-23 19:58 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20160618040343.19517-1-bobby.prani@gmail.com>
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 01/14] Introduce TCGOpcode for memory barrier Pranith Kumar
2016-06-20 21:21 ` Sergey Fedorov
2016-06-21 14:52 ` Pranith Kumar
2016-06-21 15:09 ` Alex Bennée
2016-06-21 18:06 ` Pranith Kumar
2016-06-22 15:50 ` Sergey Fedorov
2016-06-21 7:30 ` Paolo Bonzini
2016-06-21 18:04 ` Alex Bennée
2016-06-21 18:09 ` Pranith Kumar
2016-06-21 18:23 ` Alex Bennée
2016-06-21 19:40 ` Richard Henderson
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 02/14] tcg/i386: Add support for fence Pranith Kumar
2016-06-21 7:24 ` Paolo Bonzini
2016-06-22 16:25 ` Alex Bennée
2016-06-22 16:49 ` Richard Henderson
2016-06-22 18:18 ` Alex Bennée
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 03/14] tcg/aarch64: " Pranith Kumar
2016-06-23 16:18 ` Alex Bennée
2016-06-23 16:50 ` Richard Henderson
2016-06-23 19:58 ` Alex Bennée [this message]
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 04/14] tcg/arm: " Pranith Kumar
2016-06-23 16:30 ` Alex Bennée
2016-06-23 16:49 ` Richard Henderson
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 05/14] tcg/ia64: " Pranith Kumar
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 06/14] tcg/mips: " Pranith Kumar
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 07/14] tcg/ppc: " Pranith Kumar
2016-06-22 19:50 ` Sergey Fedorov
2016-06-22 20:21 ` Richard Henderson
2016-06-22 20:27 ` Sergey Fedorov
2016-06-23 14:42 ` Sergey Fedorov
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 08/14] tcg/s390: " Pranith Kumar
2016-06-21 7:26 ` Paolo Bonzini
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 09/14] tcg/sparc: " Pranith Kumar
2016-06-22 19:56 ` Sergey Fedorov
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 10/14] tcg/tci: " Pranith Kumar
2016-06-22 19:57 ` Sergey Fedorov
2016-06-22 20:25 ` Richard Henderson
2016-06-22 20:28 ` Sergey Fedorov
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 11/14] target-arm: Generate fences in ARMv7 frontend Pranith Kumar
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 12/14] target-alpha: Generate fence op Pranith Kumar
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 13/14] aarch64: Generate fences for aarch64 Pranith Kumar
2016-06-24 16:17 ` Alex Bennée
2016-06-18 4:03 ` [Qemu-devel] [RFC v3 PATCH 14/14] target-i386: Generate fences for x86 Pranith Kumar
2016-06-18 5:48 ` Richard Henderson
2016-06-20 15:05 ` Pranith Kumar
2016-06-21 7:28 ` Paolo Bonzini
2016-06-21 15:57 ` Richard Henderson
2016-06-21 16:12 ` Paolo Bonzini
2016-06-21 16:23 ` Richard Henderson
2016-06-21 16:33 ` Paolo Bonzini
2016-06-21 17:28 ` Pranith Kumar
2016-06-21 17:54 ` Peter Maydell
2016-06-21 18:03 ` Pranith Kumar
2016-06-21 18:25 ` Alex Bennée
2016-06-22 11:18 ` Sergey Fedorov
2016-06-18 4:08 ` [Qemu-devel] [RFC v3 PATCH 00/14] tcg: Add fence gen support Pranith Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87eg7nr835.fsf@linaro.org \
--to=alex.bennee@linaro.org \
--cc=bobby.prani@gmail.com \
--cc=claudio.fontana@gmail.com \
--cc=claudio.fontana@huawei.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=serge.fdrv@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).