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From: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Subject: Re: [Qemu-devel] u-boot on 'qemu-system-mips64 -M mips'
References: <4C1FF537.5020904@interdesigntech.co.jp>
Date: Tue, 22 Jun 2010 11:09:48 +0200
In-Reply-To: <4C1FF537.5020904@interdesigntech.co.jp> (KAWAKATSU Noritaka's
	message of "Tue\, 22 Jun 2010 08\:26\:47 +0900")
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To: KAWAKATSU Noritaka <kawakatsu.noritaka@interdesigntech.co.jp>
Cc: qemu-devel@nongnu.org

KAWAKATSU Noritaka <kawakatsu.noritaka@interdesigntech.co.jp> writes:

> Hi,


Hi,
>
> I have built u-boot binary for 'qemu-system-mips -M mips'.
> It is fine to run ths u-boot binary.
> But the same u-boot binary does not run on 'qemu-system-mips64 -M mips'.
>
> I do not understand what happends on the qemu-mips64 execution.
> Is this a bug for qemu-system-mips64 ?
> Or should I build u-boot binary by another configuration?
>
> ------
> * u-boot building steps
> (1) build the gcc 4.5 cross-compiler for mips from the source.
> (2) build u-boot(2010.03) by the (1)compiler.
> (3) copy the u-boot.bin to /usr/share/qemu/mips_bios.bin
> * qemu(mips) execution command
> $ qemu-system-mips -L /usr/share/qemu -d in_asm -nographic
> * get /tmp/qemu.log
> the execution seems fine.
>
> * qemu(mips64) execution command
> $ qemu-system-mips64 -L /usr/share/qemu -d in_asm -nographic
> * get /tmp/qemu.log
> the execution seems not fine. Something is wrong?
>
>
>
> ----- /tmp/qemu.log (last 10-20 lines) [qemu-system-mips64]
> IN:
> 0xffffffffbfc0ee8c:  xori	v0,v0,0x3d
> 0xffffffffbfc0ee90:  li	v1,-1
> 0xffffffffbfc0ee94:  movn	s1,v1,v0
> 0xffffffffbfc0ee98:  lw	ra,52(sp)
> 0xffffffffbfc0ee9c:  move	v0,s1
> 0xffffffffbfc0eea0:  lw	s3,48(sp)
> 0xffffffffbfc0eea4:  lw	s2,44(sp)
> 0xffffffffbfc0eea8:  lw	s1,40(sp)
> 0xffffffffbfc0eeac:  lw	s0,36(sp)
> 0xffffffffbfc0eeb0:  jr	ra
> 0xffffffffbfc0eeb4:  addiu	sp,sp,56
>
> helper_raise_exception_err: 20 0
> do_interrupt enter: PC ffffffffbfc0ee94 EPC 0000000000000000 reserved instruction exception
> do_interrupt: PC ffffffffbfc00380 EPC ffffffffbfc0ee94 cause 10
>     S 00400002 C 00808428 A 0000000000000000 D 0000000000000000

so EPC is set to ffffffffbfc0ee94 which is :
movn     s1,v1,v0

>>From what I understand when reading the mips IV manual, the movn ins is
only for mips IV / 32bit and not 64bit. Looks like the qemu code has
been written following this. (This also explains why qemu-system-mips is
fine and not qemu-system-mips64).


Arnaud