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From: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Subject: Re: [Qemu-devel] [PATCH] Fix conditional compilation (MIPS host)
References: <1252259712-11122-1-git-send-email-weil@mail.berlios.de>
Date: Mon, 07 Sep 2009 10:26:37 +0200
In-Reply-To: <1252259712-11122-1-git-send-email-weil@mail.berlios.de> (Stefan
	Weil's message of "Sun\, 6 Sep 2009 19\:55\:12 +0200")
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To: Stefan Weil <weil@mail.berlios.de>
Cc: qemu-devel@nongnu.org

Stefan Weil <weil@mail.berlios.de> writes:

Hi,

> Compilation for MIPS host (not part of official QEMU)
> checks __mips_isa_rev which is not always defined.
>
> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
> ---
>  cpu-all.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/cpu-all.h b/cpu-all.h
> index 1a6a812..ebe8bfb 100644
> --- a/cpu-all.h
> +++ b/cpu-all.h
> @@ -1021,7 +1021,7 @@ static inline int64_t cpu_get_real_ticks (void)
>  
>  static inline int64_t cpu_get_real_ticks(void)
>  {
> -#if __mips_isa_rev >= 2
> +#if defined(__mips_isa_rev) && __mips_isa_rev >= 2
>      uint32_t count;

The other fix would have to check on __mips or _MIPS_ISA (don't know how
gcc-centric are theses macros though.). Also, on linux with a kernel >=
2.6.25, one can use "rdhwr <reg>,$2" or "rdhwr <reg>,$3" 
without too many troubles as the kernel traps and emulates them. Would be
a shame imho to fallback to incrementing a counter when one can read the mips
counter.

fwiw, I had this patch :
http://git.rtp-net.org/?p=qemu.git;a=commitdiff;h=65eb2fb99e4b6a81541635171b9576ca972bebf3

Unfortunately, as I've used it only on loongson, I'm not sure if it's
safe on other boxes (this is why I didn't send this patch for merge)

Arnaud