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From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Richard W.M. Jones" <rjones@redhat.com>
Cc: Michael Clark <mjc@sifive.com>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@sifive.com>,
	qemu-devel@nongnu.org,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	RISC-V Patches <patches@groups.riscv.org>
Subject: Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission
Date: Mon, 05 Mar 2018 10:02:41 +0000	[thread overview]
Message-ID: <87fu5eu9fi.fsf@linaro.org> (raw)
In-Reply-To: <20180305084111.GM2450@redhat.com>


Richard W.M. Jones <rjones@redhat.com> writes:

> The attached patch is also needed to avoid crashes during various
> math-heavy test suites.
>
> Rich.
>
> --
<snip>
> From: Stef O'Rear <sorear2@gmail.com>
> Date: Sat, 3 Mar 2018 03:46:00 -0800
> Subject: [PATCH] softfloat: fix crash on int conversion of SNaN
>
> Signed-off-by: Stef O'Rear <sorear2@gmail.com>
> ---
>  fpu/softfloat.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index e7fb0d357a..1da1db377e 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1342,6 +1342,8 @@ static int64_t round_to_int_and_pack(FloatParts in, int rmode,
>      switch (p.cls) {
>      case float_class_snan:
>      case float_class_qnan:
> +    case float_class_dnan:
> +    case float_class_msnan:
>          return max;
>      case float_class_inf:
>          return p.sign ? min : max;
> @@ -1430,6 +1432,8 @@ static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, uint64_t max,
>      switch (p.cls) {
>      case float_class_snan:
>      case float_class_qnan:
> +    case float_class_dnan:
> +    case float_class_msnan:
>          s->float_exception_flags = orig_flags | float_flag_invalid;
>          return max;
>      case float_class_inf:

Obviously I wasn't exercising the NaN exit paths enough and we added the
return_nan() common code fairly late in the series.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

--
Alex Bennée

  reply	other threads:[~2018-03-05 10:02 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-02 13:51 [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 01/23] RISC-V Maintainers Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 02/23] RISC-V ELF Machine Definition Michael Clark
2018-03-09 13:05   ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 03/23] RISC-V CPU Core Definition Michael Clark
2018-03-03  2:23   ` Michael Clark
2018-03-03  2:34     ` Michael Clark
2018-03-05  9:44   ` Igor Mammedov
2018-03-05 22:24     ` Michael Clark
2018-03-06  8:58       ` Igor Mammedov
2018-03-06 10:41         ` Igor Mammedov
2018-03-07  3:23         ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 04/23] RISC-V Disassembler Michael Clark
2018-04-27 12:26   ` Peter Maydell
2018-04-29 23:27     ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 05/23] RISC-V CPU Helpers Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 06/23] RISC-V FPU Support Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 07/23] RISC-V GDB Stub Michael Clark
2018-03-09 12:46   ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 08/23] RISC-V TCG Code Generation Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 09/23] RISC-V Physical Memory Protection Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 10/23] RISC-V Linux User Emulation Michael Clark
2018-04-04 12:44   ` Laurent Vivier
2018-04-08 20:59     ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 11/23] Add symbol table callback interface to load_elf Michael Clark
2018-03-09 11:34   ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 12/23] RISC-V HTIF Console Michael Clark
2018-03-09 11:52   ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 13/23] RISC-V HART Array Michael Clark
2018-03-09 12:52   ` Philippe Mathieu-Daudé
2018-03-09 13:48     ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 14/23] SiFive RISC-V CLINT Block Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 15/23] SiFive RISC-V PLIC Block Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 16/23] RISC-V Spike Machines Michael Clark
2018-03-09  4:50   ` Michael Clark
2018-05-14 16:49   ` Peter Maydell
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 17/23] SiFive RISC-V Test Finisher Michael Clark
2018-03-09 11:57   ` Philippe Mathieu-Daudé
2018-03-10  3:01     ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine Michael Clark
2018-04-27 14:17   ` Peter Maydell
2018-04-30  0:18     ` Michael Clark
2018-04-30  7:49       ` Peter Maydell
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 19/23] SiFive RISC-V UART Device Michael Clark
2018-03-09 12:39   ` Philippe Mathieu-Daudé
2018-03-10  3:02     ` Michael Clark
2018-03-10  9:40       ` Mark Cave-Ayland
2018-03-11 11:43         ` Bastian Koppelmann
2018-03-16 18:30           ` Michael Clark
2018-03-16 18:36             ` Michael Clark
2018-03-16 20:46               ` Bastian Koppelmann
2018-04-10  3:21   ` Antony Pavlov
2018-04-10  6:17     ` Thomas Huth
2018-04-10  8:04       ` Antony Pavlov
2018-04-11 21:12         ` Michael Clark
2018-04-11 22:25         ` Eric Blake
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 20/23] SiFive RISC-V PRCI Block Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 21/23] SiFive Freedom E Series RISC-V Machine Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 22/23] SiFive Freedom U " Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 23/23] RISC-V Build Infrastructure Michael Clark
2018-03-02 14:33   ` Eric Blake
2018-03-03  2:37     ` Michael Clark
2018-03-05 15:59       ` Eric Blake
2018-03-09 13:03   ` Philippe Mathieu-Daudé
2018-03-02 14:17 ` [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission no-reply
2018-03-05  8:41 ` Richard W.M. Jones
2018-03-05 10:02   ` Alex Bennée [this message]
2018-03-09 15:07   ` Michael Clark
2018-03-09 16:43   ` Peter Maydell
2018-03-09 18:27     ` Richard W.M. Jones

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