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Thu, 11 Feb 2021 12:09:22 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id 143sm11359593wmb.47.2021.02.11.12.09.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Feb 2021 12:09:21 -0800 (PST) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id C5B691FF7E; Thu, 11 Feb 2021 20:09:19 +0000 (GMT) References: <20210210221053.18050-1-alex.bennee@linaro.org> <20210210221053.18050-18-alex.bennee@linaro.org> <67c46489-08b7-fce5-91c9-8416f9164456@linaro.org> User-agent: mu4e 1.5.8; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Subject: Re: [PATCH v2 17/21] accel/tcg: cache single instruction TB on pending replay exception Date: Thu, 11 Feb 2021 20:00:40 +0000 In-reply-to: <67c46489-08b7-fce5-91c9-8416f9164456@linaro.org> Message-ID: <87h7mis6xc.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, robhenry@microsoft.com, mahmoudabdalghany@outlook.com, aaron@os.amperecomputing.com, cota@braap.org, Paolo Bonzini , kuhn.chenqun@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > On 2/10/21 2:10 PM, Alex Benn=C3=A9e wrote: >> Again there is no reason to jump through the nocache hoops to execute >> a single instruction block. We do have to add an additional wrinkle to >> the cpu_handle_interrupt case to ensure we let through a TB where we >> have specifically disabled icount for the block. > > Can you say more about this? Because... > >> if (unlikely(qatomic_read(&cpu->exit_request)) >> || (icount_enabled() >> + && (cpu->cflags_next_tb =3D=3D -1 || cpu->cflags_next_tb & = CF_USE_ICOUNT) >> && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra = =3D=3D 0)) { > > ... this does not appear to match. You're checking that icount has been > explicitly *enabled*? If icount has been enabled and we are using the default cflags or enabled and we have the explicit CF_ICOUNT. The replay exception leg explicitly disables icount because otherwise we'd never actually execute the block because we have a budget of 0 cycles left. Previously we ran that block at the exception handling point - now we fall through and have to make sure we don't trigger an IRQ. > Or am I reading the logic backward and only if icount is > enabled will we take EXCP_INTERRUPT? Or I guess we have an exit_request which hasn't been handled yet but there is no EXCP_ pending. > > > r~ --=20 Alex Benn=C3=A9e