From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60150) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkT7M-0004M4-4C for qemu-devel@nongnu.org; Thu, 15 Sep 2016 05:38:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkT7H-0004Om-Ph for qemu-devel@nongnu.org; Thu, 15 Sep 2016 05:38:03 -0400 Received: from mail-wm0-f50.google.com ([74.125.82.50]:38459) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkT7H-0004OZ-GE for qemu-devel@nongnu.org; Thu, 15 Sep 2016 05:37:59 -0400 Received: by mail-wm0-f50.google.com with SMTP id 1so81227555wmz.1 for ; Thu, 15 Sep 2016 02:37:59 -0700 (PDT) References: <1472935202-3342-1-git-send-email-rth@twiddle.net> <1472935202-3342-32-git-send-email-rth@twiddle.net> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <1472935202-3342-32-git-send-email-rth@twiddle.net> Date: Thu, 15 Sep 2016 10:36:57 +0100 Message-ID: <87h99hijwm.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 31/34] linux-user: remove handling of aarch64's EXCP_STREX List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org, "Emilio G. Cota" Richard Henderson writes: > From: "Emilio G. Cota" > > The exception is not emitted anymore. > > Signed-off-by: Emilio G. Cota > Signed-off-by: Richard Henderson > Message-Id: <1467054136-10430-30-git-send-email-cota@braap.org> Reviewed-by: Alex Bennée > --- > linux-user/main.c | 125 ------------------------------------------------------ > 1 file changed, 125 deletions(-) > > diff --git a/linux-user/main.c b/linux-user/main.c > index 256382a..64838bf 100644 > --- a/linux-user/main.c > +++ b/linux-user/main.c > @@ -868,124 +868,6 @@ void cpu_loop(CPUARMState *env) > > #else > > -/* > - * Handle AArch64 store-release exclusive > - * > - * rs = gets the status result of store exclusive > - * rt = is the register that is stored > - * rt2 = is the second register store (in STP) > - * > - */ > -static int do_strex_a64(CPUARMState *env) > -{ > - uint64_t val; > - int size; > - bool is_pair; > - int rc = 1; > - int segv = 0; > - uint64_t addr; > - int rs, rt, rt2; > - > - start_exclusive(); > - /* size | is_pair << 2 | (rs << 4) | (rt << 9) | (rt2 << 14)); */ > - size = extract32(env->exclusive_info, 0, 2); > - is_pair = extract32(env->exclusive_info, 2, 1); > - rs = extract32(env->exclusive_info, 4, 5); > - rt = extract32(env->exclusive_info, 9, 5); > - rt2 = extract32(env->exclusive_info, 14, 5); > - > - addr = env->exclusive_addr; > - > - if (addr != env->exclusive_test) { > - goto finish; > - } > - > - switch (size) { > - case 0: > - segv = get_user_u8(val, addr); > - break; > - case 1: > - segv = get_user_u16(val, addr); > - break; > - case 2: > - segv = get_user_u32(val, addr); > - break; > - case 3: > - segv = get_user_u64(val, addr); > - break; > - default: > - abort(); > - } > - if (segv) { > - env->exception.vaddress = addr; > - goto error; > - } > - if (val != env->exclusive_val) { > - goto finish; > - } > - if (is_pair) { > - if (size == 2) { > - segv = get_user_u32(val, addr + 4); > - } else { > - segv = get_user_u64(val, addr + 8); > - } > - if (segv) { > - env->exception.vaddress = addr + (size == 2 ? 4 : 8); > - goto error; > - } > - if (val != env->exclusive_high) { > - goto finish; > - } > - } > - /* handle the zero register */ > - val = rt == 31 ? 0 : env->xregs[rt]; > - switch (size) { > - case 0: > - segv = put_user_u8(val, addr); > - break; > - case 1: > - segv = put_user_u16(val, addr); > - break; > - case 2: > - segv = put_user_u32(val, addr); > - break; > - case 3: > - segv = put_user_u64(val, addr); > - break; > - } > - if (segv) { > - goto error; > - } > - if (is_pair) { > - /* handle the zero register */ > - val = rt2 == 31 ? 0 : env->xregs[rt2]; > - if (size == 2) { > - segv = put_user_u32(val, addr + 4); > - } else { > - segv = put_user_u64(val, addr + 8); > - } > - if (segv) { > - env->exception.vaddress = addr + (size == 2 ? 4 : 8); > - goto error; > - } > - } > - rc = 0; > -finish: > - env->pc += 4; > - /* rs == 31 encodes a write to the ZR, thus throwing away > - * the status return. This is rather silly but valid. > - */ > - if (rs < 31) { > - env->xregs[rs] = rc; > - } > -error: > - /* instruction faulted, PC does not advance */ > - /* either way a strex releases any exclusive lock we have */ > - env->exclusive_addr = -1; > - end_exclusive(); > - return segv; > -} > - > /* AArch64 main loop */ > void cpu_loop(CPUARMState *env) > { > @@ -1026,11 +908,6 @@ void cpu_loop(CPUARMState *env) > info._sifields._sigfault._addr = env->pc; > queue_signal(env, info.si_signo, &info); > break; > - case EXCP_STREX: > - if (!do_strex_a64(env)) { > - break; > - } > - /* fall through for segv */ > case EXCP_PREFETCH_ABORT: > case EXCP_DATA_ABORT: > info.si_signo = TARGET_SIGSEGV; > @@ -1066,8 +943,6 @@ void cpu_loop(CPUARMState *env) > process_pending_signals(env); > /* Exception return on AArch64 always clears the exclusive monitor, > * so any return to running guest code implies this. > - * A strex (successful or otherwise) also clears the monitor, so > - * we don't need to specialcase EXCP_STREX. > */ > env->exclusive_addr = -1; > } -- Alex Bennée