* [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop
@ 2023-10-13 14:11 Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 1/10] util/fifo8: Allow fifo8_pop_buf() to not populate popped length Philippe Mathieu-Daudé
` (10 more replies)
0 siblings, 11 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé
Hi,
This series add support for (async) FIFO on the transmit path
of the PL011 UART.
Since v2:
- Added R-b tags
- Addressed Richard comments on migration
Since v1:
- Restrict pl011_ops[] impl access_size,
- Do not check transmitter is enabled (Peter),
- Addressed Alex's review comments,
- Simplified migration trying to care about backward compat,
but still unsure...
Philippe Mathieu-Daudé (9):
util/fifo8: Allow fifo8_pop_buf() to not populate popped length
util/fifo8: Introduce fifo8_peek_buf()
hw/char/pl011: Split RX/TX path of pl011_reset_fifo()
hw/char/pl011: Extract pl011_write_txdata() from pl011_write()
hw/char/pl011: Extract pl011_read_rxdata() from pl011_read()
hw/char/pl011: Warn when using disabled transmitter
hw/char/pl011: Check if receiver is enabled
hw/char/pl011: Rename RX FIFO methods
hw/char/pl011: Add transmit FIFO to PL011State
hw/char/pl011: Implement TX FIFO
include/hw/char/pl011.h | 2 +
include/qemu/fifo8.h | 37 +++++++++--
hw/char/pl011.c | 140 +++++++++++++++++++++++++++++-----------
util/fifo8.c | 28 ++++++--
hw/char/trace-events | 4 +-
5 files changed, 161 insertions(+), 50 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 1/10] util/fifo8: Allow fifo8_pop_buf() to not populate popped length
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 2/10] util/fifo8: Introduce fifo8_peek_buf() Philippe Mathieu-Daudé
` (9 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Francisco Iglesias
There might be cases where we know the number of bytes we can
pop from the FIFO, or we simply don't care how many bytes is
returned. Allow fifo8_pop_buf() to take a NULL numptr.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
include/qemu/fifo8.h | 10 +++++-----
util/fifo8.c | 12 ++++++++----
2 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/include/qemu/fifo8.h b/include/qemu/fifo8.h
index 16be02f361..d0d02bc73d 100644
--- a/include/qemu/fifo8.h
+++ b/include/qemu/fifo8.h
@@ -71,7 +71,7 @@ uint8_t fifo8_pop(Fifo8 *fifo);
* fifo8_pop_buf:
* @fifo: FIFO to pop from
* @max: maximum number of bytes to pop
- * @num: actual number of returned bytes
+ * @numptr: pointer filled with number of bytes returned (can be NULL)
*
* Pop a number of elements from the FIFO up to a maximum of max. The buffer
* containing the popped data is returned. This buffer points directly into
@@ -82,16 +82,16 @@ uint8_t fifo8_pop(Fifo8 *fifo);
* around in the ring buffer; in this case only a contiguous part of the data
* is returned.
*
- * The number of valid bytes returned is populated in *num; will always return
- * at least 1 byte. max must not be 0 or greater than the number of bytes in
- * the FIFO.
+ * The number of valid bytes returned is populated in *numptr; will always
+ * return at least 1 byte. max must not be 0 or greater than the number of
+ * bytes in the FIFO.
*
* Clients are responsible for checking the availability of requested data
* using fifo8_num_used().
*
* Returns: A pointer to popped data.
*/
-const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num);
+const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr);
/**
* fifo8_reset:
diff --git a/util/fifo8.c b/util/fifo8.c
index d4d1c135e0..032e985440 100644
--- a/util/fifo8.c
+++ b/util/fifo8.c
@@ -66,16 +66,20 @@ uint8_t fifo8_pop(Fifo8 *fifo)
return ret;
}
-const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num)
+const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
{
uint8_t *ret;
+ uint32_t num;
assert(max > 0 && max <= fifo->num);
- *num = MIN(fifo->capacity - fifo->head, max);
+ num = MIN(fifo->capacity - fifo->head, max);
ret = &fifo->data[fifo->head];
- fifo->head += *num;
+ fifo->head += num;
fifo->head %= fifo->capacity;
- fifo->num -= *num;
+ fifo->num -= num;
+ if (numptr) {
+ *numptr = num;
+ }
return ret;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 2/10] util/fifo8: Introduce fifo8_peek_buf()
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 1/10] util/fifo8: Allow fifo8_pop_buf() to not populate popped length Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 16:59 ` Alex Bennée
2023-10-13 14:11 ` [PATCH v3 3/10] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
` (8 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Francisco Iglesias
To be able to peek at FIFO content without popping it,
introduce the fifo8_peek_buf() method by factoring
common content from fifo8_pop_buf().
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/qemu/fifo8.h | 27 +++++++++++++++++++++++++++
util/fifo8.c | 22 ++++++++++++++++++----
2 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/include/qemu/fifo8.h b/include/qemu/fifo8.h
index d0d02bc73d..c6295c6ff0 100644
--- a/include/qemu/fifo8.h
+++ b/include/qemu/fifo8.h
@@ -93,6 +93,33 @@ uint8_t fifo8_pop(Fifo8 *fifo);
*/
const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr);
+/**
+ * fifo8_peek_buf: read upto max bytes from the fifo
+ * @fifo: FIFO to read from
+ * @max: maximum number of bytes to peek
+ * @numptr: pointer filled with number of bytes returned (can be NULL)
+ *
+ * Peek into a number of elements from the FIFO up to a maximum of max.
+ * The buffer containing the data peeked into is returned. This buffer points
+ * directly into the FIFO backing store. Since data is invalidated once any
+ * of the fifo8_* APIs are called on the FIFO, it is the caller responsibility
+ * to access it before doing further API calls.
+ *
+ * The function may return fewer bytes than requested when the data wraps
+ * around in the ring buffer; in this case only a contiguous part of the data
+ * is returned.
+ *
+ * The number of valid bytes returned is populated in *numptr; will always
+ * return at least 1 byte. max must not be 0 or greater than the number of
+ * bytes in the FIFO.
+ *
+ * Clients are responsible for checking the availability of requested data
+ * using fifo8_num_used().
+ *
+ * Returns: A pointer to peekable data.
+ */
+const uint8_t *fifo8_peek_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr);
+
/**
* fifo8_reset:
* @fifo: FIFO to reset
diff --git a/util/fifo8.c b/util/fifo8.c
index 032e985440..e12477843e 100644
--- a/util/fifo8.c
+++ b/util/fifo8.c
@@ -66,7 +66,8 @@ uint8_t fifo8_pop(Fifo8 *fifo)
return ret;
}
-const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
+static const uint8_t *fifo8_peekpop_buf(Fifo8 *fifo, uint32_t max,
+ uint32_t *numptr, bool do_pop)
{
uint8_t *ret;
uint32_t num;
@@ -74,15 +75,28 @@ const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
assert(max > 0 && max <= fifo->num);
num = MIN(fifo->capacity - fifo->head, max);
ret = &fifo->data[fifo->head];
- fifo->head += num;
- fifo->head %= fifo->capacity;
- fifo->num -= num;
+
+ if (do_pop) {
+ fifo->head += num;
+ fifo->head %= fifo->capacity;
+ fifo->num -= num;
+ }
if (numptr) {
*numptr = num;
}
return ret;
}
+const uint8_t *fifo8_peek_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
+{
+ return fifo8_peekpop_buf(fifo, max, numptr, false);
+}
+
+const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr)
+{
+ return fifo8_peekpop_buf(fifo, max, numptr, true);
+}
+
void fifo8_reset(Fifo8 *fifo)
{
fifo->num = 0;
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 3/10] hw/char/pl011: Split RX/TX path of pl011_reset_fifo()
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 1/10] util/fifo8: Allow fifo8_pop_buf() to not populate popped length Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 2/10] util/fifo8: Introduce fifo8_peek_buf() Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 4/10] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Philippe Mathieu-Daudé
` (7 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Richard Henderson
To be able to reset the RX or TX FIFO separately,
split pl011_reset_fifo() in two.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/char/pl011.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 58edeb9ddb..1f07c7b021 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -132,14 +132,21 @@ static inline unsigned pl011_get_fifo_depth(PL011State *s)
return pl011_is_fifo_enabled(s) ? PL011_FIFO_DEPTH : 1;
}
-static inline void pl011_reset_fifo(PL011State *s)
+static inline void pl011_reset_rx_fifo(PL011State *s)
{
s->read_count = 0;
s->read_pos = 0;
/* Reset FIFO flags */
- s->flags &= ~(PL011_FLAG_RXFF | PL011_FLAG_TXFF);
- s->flags |= PL011_FLAG_RXFE | PL011_FLAG_TXFE;
+ s->flags &= ~PL011_FLAG_RXFF;
+ s->flags |= PL011_FLAG_RXFE;
+}
+
+static inline void pl011_reset_tx_fifo(PL011State *s)
+{
+ /* Reset FIFO flags */
+ s->flags &= ~PL011_FLAG_TXFF;
+ s->flags |= PL011_FLAG_TXFE;
}
static uint64_t pl011_read(void *opaque, hwaddr offset,
@@ -289,7 +296,8 @@ static void pl011_write(void *opaque, hwaddr offset,
case 11: /* UARTLCR_H */
/* Reset the FIFO state on FIFO enable or disable */
if ((s->lcr ^ value) & LCR_FEN) {
- pl011_reset_fifo(s);
+ pl011_reset_rx_fifo(s);
+ pl011_reset_tx_fifo(s);
}
if ((s->lcr ^ value) & LCR_BRK) {
int break_enable = value & LCR_BRK;
@@ -506,7 +514,8 @@ static void pl011_reset(DeviceState *dev)
s->ifl = 0x12;
s->cr = 0x300;
s->flags = 0;
- pl011_reset_fifo(s);
+ pl011_reset_rx_fifo(s);
+ pl011_reset_tx_fifo(s);
}
static void pl011_class_init(ObjectClass *oc, void *data)
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 4/10] hw/char/pl011: Extract pl011_write_txdata() from pl011_write()
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 3/10] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 5/10] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Philippe Mathieu-Daudé
` (6 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé
When implementing FIFO, this code will become more complex.
Start by factoring it out to a new pl011_write_txdata() function.
No functional change intended.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
hw/char/pl011.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 1f07c7b021..1cb9015ea2 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -149,6 +149,17 @@ static inline void pl011_reset_tx_fifo(PL011State *s)
s->flags |= PL011_FLAG_TXFE;
}
+static void pl011_write_txdata(PL011State *s, uint8_t data)
+{
+ /* ??? Check if transmitter is enabled. */
+
+ /* XXX this blocks entire thread. Rewrite to use
+ * qemu_chr_fe_write and background I/O callbacks */
+ qemu_chr_fe_write_all(&s->chr, &data, 1);
+ s->int_level |= INT_TX;
+ pl011_update(s);
+}
+
static uint64_t pl011_read(void *opaque, hwaddr offset,
unsigned size)
{
@@ -262,19 +273,13 @@ static void pl011_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
PL011State *s = (PL011State *)opaque;
- unsigned char ch;
trace_pl011_write(offset, value, pl011_regname(offset));
switch (offset >> 2) {
case 0: /* UARTDR */
- /* ??? Check if transmitter is enabled. */
- ch = value;
- /* XXX this blocks entire thread. Rewrite to use
- * qemu_chr_fe_write and background I/O callbacks */
- qemu_chr_fe_write_all(&s->chr, &ch, 1);
- s->int_level |= INT_TX;
- pl011_update(s);
+ s->readbuff = value;
+ pl011_write_txdata(s, value);
break;
case 1: /* UARTRSR/UARTECR */
s->rsr = 0;
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 5/10] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read()
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 4/10] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 6/10] hw/char/pl011: Warn when using disabled transmitter Philippe Mathieu-Daudé
` (5 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Richard Henderson
To keep MemoryRegionOps read/write handlers with similar logic,
factor pl011_read_txdata() out of pl011_read(), similar to what
the previous commit did to pl011_write().
No functional change intended.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/char/pl011.c | 41 ++++++++++++++++++++++++-----------------
1 file changed, 24 insertions(+), 17 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 1cb9015ea2..30309337b1 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -160,31 +160,38 @@ static void pl011_write_txdata(PL011State *s, uint8_t data)
pl011_update(s);
}
+static uint32_t pl011_read_rxdata(PL011State *s)
+{
+ uint32_t c;
+
+ s->flags &= ~PL011_FLAG_RXFF;
+ c = s->read_fifo[s->read_pos];
+ if (s->read_count > 0) {
+ s->read_count--;
+ s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1);
+ }
+ if (s->read_count == 0) {
+ s->flags |= PL011_FLAG_RXFE;
+ }
+ if (s->read_count == s->read_trigger - 1) {
+ s->int_level &= ~ INT_RX;
+ }
+ trace_pl011_read_fifo(s->read_count);
+ s->rsr = c >> 8;
+ pl011_update(s);
+ qemu_chr_fe_accept_input(&s->chr);
+ return c;
+}
+
static uint64_t pl011_read(void *opaque, hwaddr offset,
unsigned size)
{
PL011State *s = (PL011State *)opaque;
- uint32_t c;
uint64_t r;
switch (offset >> 2) {
case 0: /* UARTDR */
- s->flags &= ~PL011_FLAG_RXFF;
- c = s->read_fifo[s->read_pos];
- if (s->read_count > 0) {
- s->read_count--;
- s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1);
- }
- if (s->read_count == 0) {
- s->flags |= PL011_FLAG_RXFE;
- }
- if (s->read_count == s->read_trigger - 1)
- s->int_level &= ~ INT_RX;
- trace_pl011_read_fifo(s->read_count);
- s->rsr = c >> 8;
- pl011_update(s);
- qemu_chr_fe_accept_input(&s->chr);
- r = c;
+ r = pl011_read_rxdata(s);
break;
case 1: /* UARTRSR */
r = s->rsr;
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 6/10] hw/char/pl011: Warn when using disabled transmitter
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 5/10] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 7/10] hw/char/pl011: Check if receiver is enabled Philippe Mathieu-Daudé
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Richard Henderson
We shouldn't transmit characters when the full UART or its
transmitter is disabled. However we don't want to break the
possibly incomplete "my first bare metal assembly program"s,
so we choose to simply display a warning when this occurs.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/char/pl011.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 30309337b1..9c43cb47bf 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -76,6 +76,10 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
#define LCR_FEN (1 << 4)
#define LCR_BRK (1 << 0)
+/* Control Register, UARTCR */
+#define CR_TXE (1 << 8)
+#define CR_UARTEN (1 << 0)
+
static const unsigned char pl011_id_arm[8] =
{ 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
static const unsigned char pl011_id_luminary[8] =
@@ -151,7 +155,12 @@ static inline void pl011_reset_tx_fifo(PL011State *s)
static void pl011_write_txdata(PL011State *s, uint8_t data)
{
- /* ??? Check if transmitter is enabled. */
+ if (!(s->cr & CR_UARTEN)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled UART\n");
+ }
+ if (!(s->cr & CR_TXE)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n");
+ }
/* XXX this blocks entire thread. Rewrite to use
* qemu_chr_fe_write and background I/O callbacks */
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 7/10] hw/char/pl011: Check if receiver is enabled
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 6/10] hw/char/pl011: Warn when using disabled transmitter Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 8/10] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
` (3 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Richard Henderson
Do not receive characters when UART or receiver are disabled.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
TODO: Understand Richard comment from v2:
this doesn't fall under "my first assembly program" because
it isn't part of "Hello, World"?
---
hw/char/pl011.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 9c43cb47bf..ca931be139 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -77,6 +77,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
#define LCR_BRK (1 << 0)
/* Control Register, UARTCR */
+#define CR_RXE (1 << 9)
#define CR_TXE (1 << 8)
#define CR_UARTEN (1 << 0)
@@ -359,9 +360,11 @@ static void pl011_write(void *opaque, hwaddr offset,
static int pl011_can_receive(void *opaque)
{
PL011State *s = (PL011State *)opaque;
- int r;
+ int r = 0;
- r = s->read_count < pl011_get_fifo_depth(s);
+ if ((s->cr & CR_UARTEN) && (s->cr & CR_RXE)) {
+ r = s->read_count < pl011_get_fifo_depth(s);
+ }
trace_pl011_can_receive(s->lcr, s->read_count, r);
return r;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 8/10] hw/char/pl011: Rename RX FIFO methods
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 7/10] hw/char/pl011: Check if receiver is enabled Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State Philippe Mathieu-Daudé
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé, Richard Henderson
In preparation of having a TX FIFO, rename the RX FIFO methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/char/pl011.c | 10 +++++-----
hw/char/trace-events | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index ca931be139..727decd428 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -369,7 +369,7 @@ static int pl011_can_receive(void *opaque)
return r;
}
-static void pl011_put_fifo(void *opaque, uint32_t value)
+static void pl011_fifo_rx_put(void *opaque, uint32_t value)
{
PL011State *s = (PL011State *)opaque;
int slot;
@@ -380,9 +380,9 @@ static void pl011_put_fifo(void *opaque, uint32_t value)
s->read_fifo[slot] = value;
s->read_count++;
s->flags &= ~PL011_FLAG_RXFE;
- trace_pl011_put_fifo(value, s->read_count);
+ trace_pl011_fifo_rx_put(value, s->read_count);
if (s->read_count == pipe_depth) {
- trace_pl011_put_fifo_full();
+ trace_pl011_fifo_rx_full();
s->flags |= PL011_FLAG_RXFF;
}
if (s->read_count == s->read_trigger) {
@@ -393,13 +393,13 @@ static void pl011_put_fifo(void *opaque, uint32_t value)
static void pl011_receive(void *opaque, const uint8_t *buf, int size)
{
- pl011_put_fifo(opaque, *buf);
+ pl011_fifo_rx_put(opaque, *buf);
}
static void pl011_event(void *opaque, QEMUChrEvent event)
{
if (event == CHR_EVENT_BREAK) {
- pl011_put_fifo(opaque, DR_BE);
+ pl011_fifo_rx_put(opaque, DR_BE);
}
}
diff --git a/hw/char/trace-events b/hw/char/trace-events
index babf4d35ea..9fd40e3aae 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -58,8 +58,8 @@ pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x valu
pl011_read_fifo(int read_count) "FIFO read, read_count now %d"
pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"
pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d"
-pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d"
-pl011_put_fifo_full(void) "FIFO now full, RXFF set"
+pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d"
+pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set"
pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")"
# cmsdk-apb-uart.c
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 8/10] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
@ 2023-10-13 14:11 ` Philippe Mathieu-Daudé
2023-10-13 17:05 ` Alex Bennée
2023-10-13 17:08 ` [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Alex Bennée
2023-10-14 6:40 ` Mark Cave-Ayland
10 siblings, 1 reply; 15+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-13 14:11 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell,
Philippe Mathieu-Daudé
In order to make the next commit easier to review,
introduce the transmit FIFO, but do not yet use it.
Uninline pl011_reset_tx_fifo().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/char/pl011.h | 2 ++
hw/char/pl011.c | 35 +++++++++++++++++++++++++++++++++--
2 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h
index d853802132..20898f43a6 100644
--- a/include/hw/char/pl011.h
+++ b/include/hw/char/pl011.h
@@ -18,6 +18,7 @@
#include "hw/sysbus.h"
#include "chardev/char-fe.h"
#include "qom/object.h"
+#include "qemu/fifo8.h"
#define TYPE_PL011 "pl011"
OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
@@ -53,6 +54,7 @@ struct PL011State {
Clock *clk;
bool migrate_clk;
const unsigned char *id;
+ Fifo8 xmit_fifo;
};
DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr);
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 727decd428..9d98bd8f9a 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -147,11 +147,13 @@ static inline void pl011_reset_rx_fifo(PL011State *s)
s->flags |= PL011_FLAG_RXFE;
}
-static inline void pl011_reset_tx_fifo(PL011State *s)
+static void pl011_reset_tx_fifo(PL011State *s)
{
/* Reset FIFO flags */
s->flags &= ~PL011_FLAG_TXFF;
s->flags |= PL011_FLAG_TXFE;
+
+ fifo8_reset(&s->xmit_fifo);
}
static void pl011_write_txdata(PL011State *s, uint8_t data)
@@ -436,6 +438,22 @@ static const VMStateDescription vmstate_pl011_clock = {
}
};
+static bool pl011_xmit_fifo_state_needed(void *opaque)
+{
+ return false;
+}
+
+static const VMStateDescription vmstate_pl011_xmit_fifo = {
+ .name = "pl011/xmit_fifo",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = pl011_xmit_fifo_state_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_FIFO8(xmit_fifo, PL011State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static int pl011_post_load(void *opaque, int version_id)
{
PL011State* s = opaque;
@@ -487,7 +505,11 @@ static const VMStateDescription vmstate_pl011 = {
.subsections = (const VMStateDescription * []) {
&vmstate_pl011_clock,
NULL
- }
+ },
+ .subsections = (const VMStateDescription * []) {
+ &vmstate_pl011_xmit_fifo,
+ NULL
+ },
};
static Property pl011_properties[] = {
@@ -502,6 +524,7 @@ static void pl011_init(Object *obj)
PL011State *s = PL011(obj);
int i;
+ fifo8_create(&s->xmit_fifo, PL011_FIFO_DEPTH);
memory_region_init_io(&s->iomem, OBJECT(s), &pl011_ops, s, "pl011", 0x1000);
sysbus_init_mmio(sbd, &s->iomem);
for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
@@ -514,6 +537,13 @@ static void pl011_init(Object *obj)
s->id = pl011_id_arm;
}
+static void pl011_finalize(Object *obj)
+{
+ PL011State *s = PL011(obj);
+
+ fifo8_destroy(&s->xmit_fifo);
+}
+
static void pl011_realize(DeviceState *dev, Error **errp)
{
PL011State *s = PL011(dev);
@@ -557,6 +587,7 @@ static const TypeInfo pl011_arm_info = {
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PL011State),
.instance_init = pl011_init,
+ .instance_finalize = pl011_finalize,
.class_init = pl011_class_init,
};
--
2.41.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 2/10] util/fifo8: Introduce fifo8_peek_buf()
2023-10-13 14:11 ` [PATCH v3 2/10] util/fifo8: Introduce fifo8_peek_buf() Philippe Mathieu-Daudé
@ 2023-10-13 16:59 ` Alex Bennée
0 siblings, 0 replies; 15+ messages in thread
From: Alex Bennée @ 2023-10-13 16:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Evgeny Iakovlev,
Marc-André Lureau, Gavin Shan, qemu-arm, Peter Maydell,
Francisco Iglesias
Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> To be able to peek at FIFO content without popping it,
> introduce the fifo8_peek_buf() method by factoring
> common content from fifo8_pop_buf().
>
> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State
2023-10-13 14:11 ` [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State Philippe Mathieu-Daudé
@ 2023-10-13 17:05 ` Alex Bennée
2023-10-13 18:14 ` Richard Henderson
0 siblings, 1 reply; 15+ messages in thread
From: Alex Bennée @ 2023-10-13 17:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Evgeny Iakovlev,
Marc-André Lureau, Gavin Shan, qemu-arm, Peter Maydell
Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> In order to make the next commit easier to review,
> introduce the transmit FIFO, but do not yet use it.
might be worth mentioning the migration bits here as well.
>
> Uninline pl011_reset_tx_fifo().
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/hw/char/pl011.h | 2 ++
> hw/char/pl011.c | 35 +++++++++++++++++++++++++++++++++--
> 2 files changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h
> index d853802132..20898f43a6 100644
> --- a/include/hw/char/pl011.h
> +++ b/include/hw/char/pl011.h
> @@ -18,6 +18,7 @@
> #include "hw/sysbus.h"
> #include "chardev/char-fe.h"
> #include "qom/object.h"
> +#include "qemu/fifo8.h"
>
> #define TYPE_PL011 "pl011"
> OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
> @@ -53,6 +54,7 @@ struct PL011State {
> Clock *clk;
> bool migrate_clk;
> const unsigned char *id;
> + Fifo8 xmit_fifo;
> };
>
> DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr);
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 727decd428..9d98bd8f9a 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -147,11 +147,13 @@ static inline void pl011_reset_rx_fifo(PL011State *s)
> s->flags |= PL011_FLAG_RXFE;
> }
>
> -static inline void pl011_reset_tx_fifo(PL011State *s)
> +static void pl011_reset_tx_fifo(PL011State *s)
> {
> /* Reset FIFO flags */
> s->flags &= ~PL011_FLAG_TXFF;
> s->flags |= PL011_FLAG_TXFE;
> +
> + fifo8_reset(&s->xmit_fifo);
> }
>
> static void pl011_write_txdata(PL011State *s, uint8_t data)
> @@ -436,6 +438,22 @@ static const VMStateDescription vmstate_pl011_clock = {
> }
> };
>
> +static bool pl011_xmit_fifo_state_needed(void *opaque)
> +{
> + return false;
> +}
> +
> +static const VMStateDescription vmstate_pl011_xmit_fifo = {
> + .name = "pl011/xmit_fifo",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .needed = pl011_xmit_fifo_state_needed,
> + .fields = (VMStateField[]) {
> + VMSTATE_FIFO8(xmit_fifo, PL011State),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> static int pl011_post_load(void *opaque, int version_id)
> {
> PL011State* s = opaque;
> @@ -487,7 +505,11 @@ static const VMStateDescription vmstate_pl011 = {
> .subsections = (const VMStateDescription * []) {
> &vmstate_pl011_clock,
> NULL
> - }
> + },
> + .subsections = (const VMStateDescription * []) {
> + &vmstate_pl011_xmit_fifo,
> + NULL
> + },
> };
Doesn't this necessitate the bumping of the migration version data or
do we not worry about new -> old migrations?
>
> static Property pl011_properties[] = {
> @@ -502,6 +524,7 @@ static void pl011_init(Object *obj)
> PL011State *s = PL011(obj);
> int i;
>
> + fifo8_create(&s->xmit_fifo, PL011_FIFO_DEPTH);
> memory_region_init_io(&s->iomem, OBJECT(s), &pl011_ops, s, "pl011", 0x1000);
> sysbus_init_mmio(sbd, &s->iomem);
> for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
> @@ -514,6 +537,13 @@ static void pl011_init(Object *obj)
> s->id = pl011_id_arm;
> }
>
> +static void pl011_finalize(Object *obj)
> +{
> + PL011State *s = PL011(obj);
> +
> + fifo8_destroy(&s->xmit_fifo);
> +}
> +
> static void pl011_realize(DeviceState *dev, Error **errp)
> {
> PL011State *s = PL011(dev);
> @@ -557,6 +587,7 @@ static const TypeInfo pl011_arm_info = {
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(PL011State),
> .instance_init = pl011_init,
> + .instance_finalize = pl011_finalize,
> .class_init = pl011_class_init,
> };
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2023-10-13 14:11 ` [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State Philippe Mathieu-Daudé
@ 2023-10-13 17:08 ` Alex Bennée
2023-10-14 6:40 ` Mark Cave-Ayland
10 siblings, 0 replies; 15+ messages in thread
From: Alex Bennée @ 2023-10-13 17:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Evgeny Iakovlev,
Marc-André Lureau, Gavin Shan, qemu-arm, Peter Maydell
Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> Hi,
>
> This series add support for (async) FIFO on the transmit path
> of the PL011 UART.
Hmm neither I or patchew received 10/10:
https://patchew.org/QEMU/20231013141131.1531-1-philmd@linaro.org/
?
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State
2023-10-13 17:05 ` Alex Bennée
@ 2023-10-13 18:14 ` Richard Henderson
0 siblings, 0 replies; 15+ messages in thread
From: Richard Henderson @ 2023-10-13 18:14 UTC (permalink / raw)
To: Alex Bennée, Philippe Mathieu-Daudé
Cc: qemu-devel, Paolo Bonzini, Evgeny Iakovlev,
Marc-André Lureau, Gavin Shan, qemu-arm, Peter Maydell
On 10/13/23 10:05, Alex Bennée wrote:
>> @@ -487,7 +505,11 @@ static const VMStateDescription vmstate_pl011 = {
>> .subsections = (const VMStateDescription * []) {
>> &vmstate_pl011_clock,
>> NULL
>> - }
>> + },
>> + .subsections = (const VMStateDescription * []) {
>> + &vmstate_pl011_xmit_fifo,
>> + NULL
>> + },
>> };
>
> Doesn't this necessitate the bumping of the migration version data or
> do we not worry about new -> old migrations?
We usually don't care about new->old, however:
If the fifo is empty, migration will still work because of the subsection.
If the fifo is not empty... I think the subsection will be ignored, with the only
consequence being that some characters will be dropped.
r~
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2023-10-13 17:08 ` [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Alex Bennée
@ 2023-10-14 6:40 ` Mark Cave-Ayland
10 siblings, 0 replies; 15+ messages in thread
From: Mark Cave-Ayland @ 2023-10-14 6:40 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Paolo Bonzini, Evgeny Iakovlev, Marc-André Lureau,
Gavin Shan, Alex Bennée, qemu-arm, Peter Maydell
On 13/10/2023 15:11, Philippe Mathieu-Daudé wrote:
> Hi,
>
> This series add support for (async) FIFO on the transmit path
> of the PL011 UART.
>
> Since v2:
> - Added R-b tags
> - Addressed Richard comments on migration
>
> Since v1:
> - Restrict pl011_ops[] impl access_size,
> - Do not check transmitter is enabled (Peter),
> - Addressed Alex's review comments,
> - Simplified migration trying to care about backward compat,
> but still unsure...
>
> Philippe Mathieu-Daudé (9):
> util/fifo8: Allow fifo8_pop_buf() to not populate popped length
> util/fifo8: Introduce fifo8_peek_buf()
> hw/char/pl011: Split RX/TX path of pl011_reset_fifo()
> hw/char/pl011: Extract pl011_write_txdata() from pl011_write()
> hw/char/pl011: Extract pl011_read_rxdata() from pl011_read()
> hw/char/pl011: Warn when using disabled transmitter
> hw/char/pl011: Check if receiver is enabled
> hw/char/pl011: Rename RX FIFO methods
> hw/char/pl011: Add transmit FIFO to PL011State
> hw/char/pl011: Implement TX FIFO
>
> include/hw/char/pl011.h | 2 +
> include/qemu/fifo8.h | 37 +++++++++--
> hw/char/pl011.c | 140 +++++++++++++++++++++++++++++-----------
> util/fifo8.c | 28 ++++++--
> hw/char/trace-events | 4 +-
> 5 files changed, 161 insertions(+), 50 deletions(-)
Looks like patch 10 where all the interesting stuff is didn't make it to the list?
Patchew also agrees here:
https://patchew.org/QEMU/20231013141131.1531-1-philmd@linaro.org/.
ATB,
Mark.
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2023-10-14 6:41 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-10-13 14:11 [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 1/10] util/fifo8: Allow fifo8_pop_buf() to not populate popped length Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 2/10] util/fifo8: Introduce fifo8_peek_buf() Philippe Mathieu-Daudé
2023-10-13 16:59 ` Alex Bennée
2023-10-13 14:11 ` [PATCH v3 3/10] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 4/10] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 5/10] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 6/10] hw/char/pl011: Warn when using disabled transmitter Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 7/10] hw/char/pl011: Check if receiver is enabled Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 8/10] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
2023-10-13 14:11 ` [PATCH v3 9/10] hw/char/pl011: Add transmit FIFO to PL011State Philippe Mathieu-Daudé
2023-10-13 17:05 ` Alex Bennée
2023-10-13 18:14 ` Richard Henderson
2023-10-13 17:08 ` [PATCH v3 0/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Alex Bennée
2023-10-14 6:40 ` Mark Cave-Ayland
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