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From: Fabiano Rosas <farosas@linux.ibm.com>
To: Matheus Ferst <matheus.ferst@eldorado.org.br>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au,
	groug@kaod.org, fbarrat@linux.ibm.com, alex.bennee@linaro.org,
	Matheus Ferst <matheus.ferst@eldorado.org.br>
Subject: Re: [RFC PATCH v2 28/29] target/ppc: unify cpu->has_work based on cs->interrupt_request
Date: Mon, 03 Oct 2022 11:12:25 -0300	[thread overview]
Message-ID: <87ill1573q.fsf@linux.ibm.com> (raw)
In-Reply-To: <20220927201544.4088567-29-matheus.ferst@eldorado.org.br>

Matheus Ferst <matheus.ferst@eldorado.org.br> writes:

> Now that cs->interrupt_request indicates if there is any unmasked
> interrupt, checking if the CPU has work to do can be simplified to a
> single check that works for all CPU models.
>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>

Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>

> ---
>  target/ppc/cpu_init.c | 94 +------------------------------------------
>  1 file changed, 1 insertion(+), 93 deletions(-)
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 26686d1557..4d0064c7a5 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -5984,27 +5984,10 @@ int p7_interrupt_powersave(CPUPPCState *env)
>      return 0;
>  }
>  
> -static bool cpu_has_work_POWER7(CPUState *cs)
> -{
> -    PowerPCCPU *cpu = POWERPC_CPU(cs);
> -    CPUPPCState *env = &cpu->env;
> -
> -    if (cs->halted) {
> -        if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
> -            return false;
> -        }
> -        return p7_interrupt_powersave(env) != 0;
> -    } else {
> -        return FIELD_EX64(env->msr, MSR, EE) &&
> -               (cs->interrupt_request & CPU_INTERRUPT_HARD);
> -    }
> -}
> -
>  POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
>      PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
> -    CPUClass *cc = CPU_CLASS(oc);
>  
>      dc->fw_name = "PowerPC,POWER7";
>      dc->desc = "POWER7";
> @@ -6013,7 +5996,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
>      pcc->pcr_supported = PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
>      pcc->init_proc = init_proc_POWER7;
>      pcc->check_pow = check_pow_nocheck;
> -    cc->has_work = cpu_has_work_POWER7;
>      pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
>                         PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
>                         PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
> @@ -6170,27 +6152,10 @@ int p8_interrupt_powersave(CPUPPCState *env)
>      return 0;
>  }
>  
> -static bool cpu_has_work_POWER8(CPUState *cs)
> -{
> -    PowerPCCPU *cpu = POWERPC_CPU(cs);
> -    CPUPPCState *env = &cpu->env;
> -
> -    if (cs->halted) {
> -        if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
> -            return false;
> -        }
> -        return p8_interrupt_powersave(env) != 0;
> -    } else {
> -        return FIELD_EX64(env->msr, MSR, EE) &&
> -               (cs->interrupt_request & CPU_INTERRUPT_HARD);
> -    }
> -}
> -
>  POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
>      PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
> -    CPUClass *cc = CPU_CLASS(oc);
>  
>      dc->fw_name = "PowerPC,POWER8";
>      dc->desc = "POWER8";
> @@ -6199,7 +6164,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
>      pcc->pcr_supported = PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
>      pcc->init_proc = init_proc_POWER8;
>      pcc->check_pow = check_pow_nocheck;
> -    cc->has_work = cpu_has_work_POWER8;
>      pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
>                         PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
>                         PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
> @@ -6407,35 +6371,10 @@ int p9_interrupt_powersave(CPUPPCState *env)
>      return 0;
>  }
>  
> -static bool cpu_has_work_POWER9(CPUState *cs)
> -{
> -    PowerPCCPU *cpu = POWERPC_CPU(cs);
> -    CPUPPCState *env = &cpu->env;
> -
> -    if (cs->halted) {
> -        uint64_t psscr = env->spr[SPR_PSSCR];
> -
> -        if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
> -            return false;
> -        }
> -
> -        /* If EC is clear, just return true on any pending interrupt */
> -        if (!(psscr & PSSCR_EC)) {
> -            return true;
> -        }
> -
> -        return p9_interrupt_powersave(env) != 0;
> -    } else {
> -        return FIELD_EX64(env->msr, MSR, EE) &&
> -               (cs->interrupt_request & CPU_INTERRUPT_HARD);
> -    }
> -}
> -
>  POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
>      PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
> -    CPUClass *cc = CPU_CLASS(oc);
>  
>      dc->fw_name = "PowerPC,POWER9";
>      dc->desc = "POWER9";
> @@ -6445,7 +6384,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
>                           PCR_COMPAT_2_05;
>      pcc->init_proc = init_proc_POWER9;
>      pcc->check_pow = check_pow_nocheck;
> -    cc->has_work = cpu_has_work_POWER9;
>      pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
>                         PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
>                         PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
> @@ -6604,35 +6542,10 @@ static bool ppc_pvr_match_power10(PowerPCCPUClass *pcc, uint32_t pvr, bool best)
>      return false;
>  }
>  
> -static bool cpu_has_work_POWER10(CPUState *cs)
> -{
> -    PowerPCCPU *cpu = POWERPC_CPU(cs);
> -    CPUPPCState *env = &cpu->env;
> -
> -    if (cs->halted) {
> -        uint64_t psscr = env->spr[SPR_PSSCR];
> -
> -        if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
> -            return false;
> -        }
> -
> -        /* If EC is clear, just return true on any pending interrupt */
> -        if (!(psscr & PSSCR_EC)) {
> -            return true;
> -        }
> -
> -        return p9_interrupt_powersave(env) != 0;
> -    } else {
> -        return FIELD_EX64(env->msr, MSR, EE) &&
> -               (cs->interrupt_request & CPU_INTERRUPT_HARD);
> -    }
> -}
> -
>  POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
>      PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
> -    CPUClass *cc = CPU_CLASS(oc);
>  
>      dc->fw_name = "PowerPC,POWER10";
>      dc->desc = "POWER10";
> @@ -6643,7 +6556,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
>                           PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
>      pcc->init_proc = init_proc_POWER10;
>      pcc->check_pow = check_pow_nocheck;
> -    cc->has_work = cpu_has_work_POWER10;
>      pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
>                         PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
>                         PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
> @@ -7200,11 +7112,7 @@ static void ppc_cpu_set_pc(CPUState *cs, vaddr value)
>  
>  static bool ppc_cpu_has_work(CPUState *cs)
>  {
> -    PowerPCCPU *cpu = POWERPC_CPU(cs);
> -    CPUPPCState *env = &cpu->env;
> -
> -    return FIELD_EX64(env->msr, MSR, EE) &&
> -           (cs->interrupt_request & CPU_INTERRUPT_HARD);
> +    return cs->interrupt_request & CPU_INTERRUPT_HARD;
>  }
>  
>  static void ppc_cpu_reset(DeviceState *dev)


  reply	other threads:[~2022-10-03 14:16 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-27 20:15 [RFC PATCH v2 00/29] PowerPC interrupt rework Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 01/29] target/ppc: define PPC_INTERRUPT_* values directly Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 02/29] target/ppc: always use ppc_set_irq to set env->pending_interrupts Matheus Ferst
2022-09-30 14:32   ` Fabiano Rosas
2022-09-27 20:15 ` [RFC PATCH v2 03/29] target/ppc: split interrupt masking and delivery from ppc_hw_interrupt Matheus Ferst
2022-09-30 15:55   ` Fabiano Rosas
2022-09-27 20:15 ` [RFC PATCH v2 04/29] target/ppc: prepare to split interrupt masking and delivery by excp_model Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 05/29] target/ppc: create an interrupt masking method for POWER9/POWER10 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 06/29] target/ppc: remove unused interrupts from p9_pending_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 07/29] target/ppc: create an interrupt delivery method for POWER9/POWER10 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 08/29] target/ppc: remove unused interrupts from p9_deliver_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 09/29] target/ppc: remove generic architecture checks " Matheus Ferst
2022-09-30 18:13   ` Fabiano Rosas
2022-10-03 15:45     ` Matheus K. Ferst
2022-10-03 16:59       ` Fabiano Rosas
2022-09-27 20:15 ` [RFC PATCH v2 10/29] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER9 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 11/29] target/ppc: add power-saving interrupt masking logic to p9_next_unmasked_interrupt Matheus Ferst
2022-09-30 18:38   ` Fabiano Rosas
2022-10-03 15:46     ` Matheus K. Ferst
2022-10-03 17:01       ` Fabiano Rosas
2022-09-27 20:15 ` [RFC PATCH v2 12/29] target/ppc: create an interrupt masking method for POWER8 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 13/29] target/ppc: remove unused interrupts from p8_pending_interrupt Matheus Ferst
2022-09-27 22:14   ` Fabiano Rosas
2022-10-03 15:45     ` Matheus K. Ferst
2022-09-27 20:15 ` [RFC PATCH v2 14/29] target/ppc: create an interrupt delivery method for POWER8 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 15/29] target/ppc: remove unused interrupts from p8_deliver_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 16/29] target/ppc: remove generic architecture checks " Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 17/29] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER8 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 18/29] target/ppc: add power-saving interrupt masking logic to p8_next_unmasked_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 19/29] target/ppc: create an interrupt masking method for POWER7 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 20/29] target/ppc: remove unused interrupts from p7_pending_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 21/29] target/ppc: create an interrupt delivery method for POWER7 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 22/29] target/ppc: remove unused interrupts from p7_deliver_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 23/29] target/ppc: remove generic architecture checks " Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 24/29] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER7 Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 25/29] target/ppc: add power-saving interrupt masking logic to p7_next_unmasked_interrupt Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 26/29] target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY builds Matheus Ferst
2022-09-27 20:15 ` [RFC PATCH v2 27/29] target/ppc: introduce ppc_maybe_interrupt Matheus Ferst
2022-10-03 14:11   ` Fabiano Rosas
2022-09-27 20:15 ` [RFC PATCH v2 28/29] target/ppc: unify cpu->has_work based on cs->interrupt_request Matheus Ferst
2022-10-03 14:12   ` Fabiano Rosas [this message]
2022-09-27 20:15 ` [RFC PATCH v2 29/29] target/ppc: move the p*_interrupt_powersave methods to excp_helper.c Matheus Ferst
2022-10-03 14:13   ` Fabiano Rosas
2022-09-28 17:31 ` [RFC PATCH v2 00/29] PowerPC interrupt rework Cédric Le Goater
2022-10-03 15:45   ` Matheus K. Ferst
2022-10-03 20:58     ` Cédric Le Goater

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