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Cota" Subject: Re: [PATCH v2 3/6] cputlb: ensure we save the IOTLB data in case of reset In-reply-to: <20200621203307.GA168836@sff> Date: Mon, 22 Jun 2020 10:02:50 +0100 Message-ID: <87imfja2x1.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, qemu-devel@nongnu.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, Paolo Bonzini , kuhn.chenqun@huawei.com, peter.puhov@linaro.org, Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Emilio G. Cota writes: > On Wed, Jun 10, 2020 at 16:55:06 +0100, Alex Benn=C3=A9e wrote: >> Any write to a device might cause a re-arrangement of memory >> triggering a TLB flush and potential re-size of the TLB invalidating >> previous entries. This would cause users of qemu_plugin_get_hwaddr() >> to see the warning: >>=20 >> invalid use of qemu_plugin_get_hwaddr >>=20 >> because of the failed tlb_lookup which should always succeed. To >> prevent this we save the IOTLB data in case it is later needed by a >> plugin doing a lookup. >>=20 >> Signed-off-by: Alex Benn=C3=A9e >>=20 >> --- >> v2 >> - save the entry instead of re-running the tlb_fill. >>=20 >> squash! cputlb: ensure we save the IOTLB entry in case of reset >> --- >> accel/tcg/cputlb.c | 63 ++++++++++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 61 insertions(+), 2 deletions(-) >>=20 >> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c >> index eb2cf9de5e6..9bf9e479c7c 100644 >> --- a/accel/tcg/cputlb.c >> +++ b/accel/tcg/cputlb.c >> @@ -1058,6 +1058,47 @@ static uint64_t io_readx(CPUArchState *env, CPUIO= TLBEntry *iotlbentry, >> return val; >> } >>=20=20 >> +#ifdef CONFIG_PLUGIN >> + >> +typedef struct SavedIOTLB { >> + struct rcu_head rcu; >> + struct SavedIOTLB **save_loc; >> + MemoryRegionSection *section; >> + hwaddr mr_offset; >> +} SavedIOTLB; >> + >> +static void clean_saved_entry(SavedIOTLB *s) >> +{ >> + atomic_rcu_set(s->save_loc, NULL); > > This will race with the CPU thread that sets saved_for_plugin in > save_iotlb_data(). Surely that only happens outside the critical section? > >> + g_free(s); >> +} >> + >> +static __thread SavedIOTLB *saved_for_plugin; > > Apologies if this has been discussed, but why is this using TLS > variables and not state embedded in CPUState? Good point - I guess I;m being lazy. > I see that qemu_plugin_get_hwaddr does not take a cpu_index, but > maybe it should? We could then just embed the RCU pointer in CPUState. > >> + >> +/* >> + * Save a potentially trashed IOTLB entry for later lookup by plugin. >> + * >> + * We also need to track the thread storage address because the RCU >> + * cleanup that runs when we leave the critical region (the current >> + * execution) is actually in a different thread. >> + */ >> +static void save_iotlb_data(MemoryRegionSection *section, hwaddr mr_off= set) >> +{ >> + SavedIOTLB *s =3D g_new(SavedIOTLB, 1); >> + s->save_loc =3D &saved_for_plugin; >> + s->section =3D section; >> + s->mr_offset =3D mr_offset; >> + atomic_rcu_set(&saved_for_plugin, s); >> + call_rcu(s, clean_saved_entry, rcu); > > Here we could just publish the new pointer and g_free_rcu the old > one, if any. That would be simpler. I'll re-spin. > >> +} >> + >> +#else >> +static void save_iotlb_data(MemoryRegionSection *section, hwaddr mr_off= set) >> +{ >> + /* do nothing */ >> +} >> +#endif >> + >> static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry, >> int mmu_idx, uint64_t val, target_ulong addr, >> uintptr_t retaddr, MemOp op) >> @@ -1077,6 +1118,12 @@ static void io_writex(CPUArchState *env, CPUIOTLB= Entry *iotlbentry, >> } >> cpu->mem_io_pc =3D retaddr; >>=20=20 >> + /* >> + * The memory_region_dispatch may trigger a flush/resize >> + * so for plugins we save the iotlb_data just in case. >> + */ >> + save_iotlb_data(section, mr_offset); >> + >> if (mr->global_locking && !qemu_mutex_iothread_locked()) { >> qemu_mutex_lock_iothread(); >> locked =3D true; >> @@ -1091,6 +1138,7 @@ static void io_writex(CPUArchState *env, CPUIOTLBE= ntry *iotlbentry, >> MMU_DATA_STORE, mmu_idx, iotlbentry->att= rs, r, >> retaddr); >> } >> + > > Stray whitespace change. > >> if (locked) { >> qemu_mutex_unlock_iothread(); >> } >> @@ -1366,8 +1414,11 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_pt= r addr, >> * in the softmmu lookup code (or helper). We don't handle re-fills or >> * checking the victim table. This is purely informational. >> * >> - * This should never fail as the memory access being instrumented >> - * should have just filled the TLB. >> + * This almost never fails as the memory access being instrumented >> + * should have just filled the TLB. The one corner case is io_writex >> + * which can cause TLB flushes and potential resizing of the TLBs >> + * loosing the information we need. In those cases we need to recover >> + * data from a thread local copy of the io_tlb entry. >> */ >>=20=20 >> bool tlb_plugin_lookup(CPUState *cpu, target_ulong addr, int mmu_idx, >> @@ -1391,6 +1442,14 @@ bool tlb_plugin_lookup(CPUState *cpu, target_ulon= g addr, int mmu_idx, >> data->v.ram.hostaddr =3D addr + tlbe->addend; >> } >> return true; >> + } else { >> + SavedIOTLB *saved =3D atomic_rcu_read(&saved_for_plugin); >> + if (saved) { >> + data->is_io =3D true; >> + data->v.io.section =3D saved->section; >> + data->v.io.offset =3D saved->mr_offset; >> + return true; >> + } > > Shouldn't we check that the contents of the saved IOTLB match the > parameters of the lookup? Otherwise passing a random address is likely > to land here. Good point - I'm being too trusting here ;-) Thanks for the review. --=20 Alex Benn=C3=A9e