From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56919C433FF for ; Wed, 7 Aug 2019 15:23:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 147DA2199C for ; Wed, 7 Aug 2019 15:23:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="JIGCqUyh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 147DA2199C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:42458 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvNmX-0002fI-8L for qemu-devel@archiver.kernel.org; Wed, 07 Aug 2019 11:23:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52717) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvNm1-0001lN-09 for qemu-devel@nongnu.org; Wed, 07 Aug 2019 11:22:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hvNly-0000lz-77 for qemu-devel@nongnu.org; Wed, 07 Aug 2019 11:22:44 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:41939) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hvNlu-0000kb-Bq for qemu-devel@nongnu.org; Wed, 07 Aug 2019 11:22:39 -0400 Received: by mail-wr1-x444.google.com with SMTP id c2so88565939wrm.8 for ; Wed, 07 Aug 2019 08:22:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=references:user-agent:from:to:subject:in-reply-to:date:message-id :mime-version:content-transfer-encoding; bh=igSU4NVGo2xmLXyja+3qyle68oej0P/fZydr3KfRZ+U=; b=JIGCqUyhFipmyxcpJZebqanX7MKNHuSU4qQCSY/VDOARs4IrKSKpBp495Bdnr2IOHg oeA2Ilp8PyKC30xGJ5PXkaOBiFxF7c2RlE8fzYshNJ0u52rKba/yJ/2nmseLDSj7OSmG cswq2ne08FAdUHm8My4GZH2T9B0/wKoLP2W0b8zBjVOqqg9wkplr3HKiZ2cpxmPIRQ0f VT0Hd1usAbbQ9BCeKUetAnH2Vr+A+KfU+XQAlkhnvCjomDLgAQJz8IKT7k/KwVAzFXZN tFMhZBevRbyBmRiUUEfyn+DNqrMSuAwLCb3qV6JHnam8k2kDyQw6uE83vPtOVpVcv1Rd ZZJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:references:user-agent:from:to:subject :in-reply-to:date:message-id:mime-version:content-transfer-encoding; bh=igSU4NVGo2xmLXyja+3qyle68oej0P/fZydr3KfRZ+U=; b=K7WUBlbQyF2gFZ0v9ZBdltN8n9orFBqwgbOLSbqMbWZQeBwHSA7xP54ImTls/Yi5g1 U7HyuZAvIUxglodNUzl+SRQ8HHIU3YC4Ai8FUnFJgYlEhRzR8PbU+m8zcdm2/0C3A3Yh ZTkGyKbMZtOxXExnXLs2xje+/zO6cXLCcHGvvXJcXxsuccUffoRnGzO3XnBdSI66K71V re/McS98j10yIR9pWt2ypDm8wEEIAXzy920dK8BoifIv3+y0QawhmRIEnWVYIrcZ80hj 4do6Fgfk7JVT931jVotU+sK6eufr5ArtfLTCe/Ao3P4XW4alNKDQfC6PKMFq0bcodDdZ nI0g== X-Gm-Message-State: APjAAAXy4u1icuQVcZ/wjGQoni/ElM4BmoZmEnEpByv6BztWAQfDQ9gg 4u9phlEcGHvpVV+9dgZgGt3BQXtMAws= X-Google-Smtp-Source: APXvYqy1p0e/L5zsgAyz89i5Ham4Dl/Wp4IYyeJcy7+nmksNCSZQAtyyBC2+UTfurAWKL39PFornMA== X-Received: by 2002:adf:e6c5:: with SMTP id y5mr4075623wrm.2.1565191355336; Wed, 07 Aug 2019 08:22:35 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id c15sm14663460wrb.80.2019.08.07.08.22.34 for (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 07 Aug 2019 08:22:34 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 3A7C31FF87 for ; Wed, 7 Aug 2019 16:22:34 +0100 (BST) References: <20190806151435.10740-1-armbru@redhat.com> <20190806151435.10740-15-armbru@redhat.com> User-agent: mu4e 1.3.4; emacs 27.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: qemu-devel@nongnu.org In-reply-to: <20190806151435.10740-15-armbru@redhat.com> Date: Wed, 07 Aug 2019 16:22:34 +0100 Message-ID: <87imr9huf9.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: Re: [Qemu-devel] [PATCH v2 14/29] migration: Move the VMStateDescription typedef to typedefs.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Markus Armbruster writes: > We declare incomplete struct VMStateDescription in a couple of places > so we don't have to include migration/vmstate.h for the typedef. > That's fine with me. However, the next commit will drop > migration/vmstate.h from a massive number of compiles. Move the > typedef to qemu/typedefs.h now, so I don't have to insert struct in > front of VMStateDescription all over the place then. > > Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e > --- > include/hw/qdev-core.h | 6 ++---- > include/migration/vmstate.h | 1 - > include/qemu/typedefs.h | 1 + > include/qom/cpu.h | 4 ++-- > target/alpha/cpu.h | 2 +- > target/arm/cpu.h | 2 +- > target/cris/cpu.h | 2 +- > target/hppa/cpu.h | 2 +- > target/i386/cpu.h | 2 +- > target/lm32/cpu.h | 2 +- > target/mips/internal.h | 2 +- > target/openrisc/cpu.h | 2 +- > target/ppc/cpu-qom.h | 2 +- > target/ppc/cpu.h | 2 +- > target/s390x/cpu.h | 2 +- > target/sparc/cpu.h | 2 +- > 16 files changed, 17 insertions(+), 19 deletions(-) > > diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h > index b870c8ceeb..e5b62dd2fc 100644 > --- a/include/hw/qdev-core.h > +++ b/include/hw/qdev-core.h > @@ -35,8 +35,6 @@ typedef void (*DeviceReset)(DeviceState *dev); > typedef void (*BusRealize)(BusState *bus, Error **errp); > typedef void (*BusUnrealize)(BusState *bus, Error **errp); > > -struct VMStateDescription; > - > /** > * DeviceClass: > * @props: Properties accessing state fields. > @@ -112,7 +110,7 @@ typedef struct DeviceClass { > DeviceUnrealize unrealize; > > /* device state */ > - const struct VMStateDescription *vmsd; > + const VMStateDescription *vmsd; > > /* Private to qdev / bus. */ > const char *bus_type; > @@ -425,7 +423,7 @@ void device_class_set_parent_unrealize(DeviceClass *d= c, > DeviceUnrealize dev_unrealize, > DeviceUnrealize *parent_unrealize= ); > > -const struct VMStateDescription *qdev_get_vmsd(DeviceState *dev); > +const VMStateDescription *qdev_get_vmsd(DeviceState *dev); > > const char *qdev_fw_name(DeviceState *dev); > > diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h > index c2bfa7a7f0..1fbfd099dd 100644 > --- a/include/migration/vmstate.h > +++ b/include/migration/vmstate.h > @@ -28,7 +28,6 @@ > #define QEMU_VMSTATE_H > > typedef struct VMStateInfo VMStateInfo; > -typedef struct VMStateDescription VMStateDescription; > typedef struct VMStateField VMStateField; > > /* VMStateInfo allows customized migration of objects that don't fit in > diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h > index c32efb5b18..9e1283aacf 100644 > --- a/include/qemu/typedefs.h > +++ b/include/qemu/typedefs.h > @@ -101,6 +101,7 @@ typedef struct SHPCDevice SHPCDevice; > typedef struct SSIBus SSIBus; > typedef struct VirtIODevice VirtIODevice; > typedef struct Visitor Visitor; > +typedef struct VMStateDescription VMStateDescription; > > /* > * Pointer types > diff --git a/include/qom/cpu.h b/include/qom/cpu.h > index 5ee0046b62..ddb91bbaff 100644 > --- a/include/qom/cpu.h > +++ b/include/qom/cpu.h > @@ -215,7 +215,7 @@ typedef struct CPUClass { > int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, > void *opaque); > > - const struct VMStateDescription *vmsd; > + const VMStateDescription *vmsd; > const char *gdb_core_xml_file; > gchar * (*gdb_arch_name)(CPUState *cpu); > const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlna= me); > @@ -1108,7 +1108,7 @@ bool target_words_bigendian(void); > #ifdef NEED_CPU_H > > #ifdef CONFIG_SOFTMMU > -extern const struct VMStateDescription vmstate_cpu_common; > +extern const VMStateDescription vmstate_cpu_common; > #else > #define vmstate_cpu_common vmstate_dummy > #endif > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > index b3e8a823e1..4619530660 100644 > --- a/target/alpha/cpu.h > +++ b/target/alpha/cpu.h > @@ -277,7 +277,7 @@ struct AlphaCPU { > > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_alpha_cpu; > +extern const VMStateDescription vmstate_alpha_cpu; > #endif > > void alpha_cpu_do_interrupt(CPUState *cpu); > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index 94c990cddb..2cdde6c4bc 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -922,7 +922,7 @@ void arm_cpu_post_init(Object *obj); > uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz); > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_arm_cpu; > +extern const VMStateDescription vmstate_arm_cpu; > #endif > > void arm_cpu_do_interrupt(CPUState *cpu); > diff --git a/target/cris/cpu.h b/target/cris/cpu.h > index fb14ad51f1..aba0a66474 100644 > --- a/target/cris/cpu.h > +++ b/target/cris/cpu.h > @@ -183,7 +183,7 @@ struct CRISCPU { > > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_cris_cpu; > +extern const VMStateDescription vmstate_cris_cpu; > #endif > > void cris_cpu_do_interrupt(CPUState *cpu); > diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h > index e9fba96be9..4b816cc13a 100644 > --- a/target/hppa/cpu.h > +++ b/target/hppa/cpu.h > @@ -334,7 +334,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, > int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, > int type, hwaddr *pphys, int *pprot); > extern const MemoryRegionOps hppa_io_eir_ops; > -extern const struct VMStateDescription vmstate_hppa_cpu; > +extern const VMStateDescription vmstate_hppa_cpu; > void hppa_cpu_alarm_timer(void *); > int hppa_artype_for_page(CPUHPPAState *env, target_ulong vaddr); > #endif > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 8b3dc5533e..ecd0ec0899 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -1516,7 +1516,7 @@ struct X86CPU { > > > #ifndef CONFIG_USER_ONLY > -extern struct VMStateDescription vmstate_x86_cpu; > +extern VMStateDescription vmstate_x86_cpu; > #endif > > /** > diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h > index c2bbfa2780..064c6b1267 100644 > --- a/target/lm32/cpu.h > +++ b/target/lm32/cpu.h > @@ -195,7 +195,7 @@ struct LM32CPU { > > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_lm32_cpu; > +extern const VMStateDescription vmstate_lm32_cpu; > #endif > > void lm32_cpu_do_interrupt(CPUState *cpu); > diff --git a/target/mips/internal.h b/target/mips/internal.h > index b2b41a51ab..d5aa5490d3 100644 > --- a/target/mips/internal.h > +++ b/target/mips/internal.h > @@ -148,7 +148,7 @@ hwaddr cpu_mips_translate_address(CPUMIPSState *env, = target_ulong address, > #define cpu_signal_handler cpu_mips_signal_handler > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_mips_cpu; > +extern const VMStateDescription vmstate_mips_cpu; > #endif > > static inline bool cpu_mips_hw_interrupts_enabled(CPUMIPSState *env) > diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h > index f23b25262d..61ade1d4f0 100644 > --- a/target/openrisc/cpu.h > +++ b/target/openrisc/cpu.h > @@ -333,7 +333,7 @@ int print_insn_or1k(bfd_vma addr, disassemble_info *i= nfo); > #define cpu_signal_handler cpu_openrisc_signal_handler > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_openrisc_cpu; > +extern const VMStateDescription vmstate_openrisc_cpu; > > /* hw/openrisc_pic.c */ > void cpu_openrisc_pic_init(OpenRISCCPU *cpu); > diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h > index be9b4c30c3..a2f202f021 100644 > --- a/target/ppc/cpu-qom.h > +++ b/target/ppc/cpu-qom.h > @@ -203,7 +203,7 @@ typedef struct PPCTimebase { > int64_t time_of_the_day_ns; > } PPCTimebase; > > -extern const struct VMStateDescription vmstate_ppc_timebase; > +extern const VMStateDescription vmstate_ppc_timebase; > > #define VMSTATE_PPC_TIMEBASE_V(_field, _state, _version) { \ > .name =3D (stringify(_field)), \ > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > index c9beba2a5c..4ea33cf696 100644 > --- a/target/ppc/cpu.h > +++ b/target/ppc/cpu.h > @@ -1255,7 +1255,7 @@ int ppc32_cpu_write_elf32_note(WriteCoreDumpFunctio= n f, CPUState *cs, > int cpuid, void *opaque); > #ifndef CONFIG_USER_ONLY > void ppc_cpu_do_system_reset(CPUState *cs); > -extern const struct VMStateDescription vmstate_ppc_cpu; > +extern const VMStateDescription vmstate_ppc_cpu; > #endif > > /***********************************************************************= ******/ > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h > index a606547b4d..3d9de25f7c 100644 > --- a/target/s390x/cpu.h > +++ b/target/s390x/cpu.h > @@ -163,7 +163,7 @@ struct S390CPU { > > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_s390_cpu; > +extern const VMStateDescription vmstate_s390_cpu; > #endif > > /* distinguish between 24 bit and 31 bit addressing */ > diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h > index 8ed2250cd0..0d5b01efe5 100644 > --- a/target/sparc/cpu.h > +++ b/target/sparc/cpu.h > @@ -532,7 +532,7 @@ struct SPARCCPU { > > > #ifndef CONFIG_USER_ONLY > -extern const struct VMStateDescription vmstate_sparc_cpu; > +extern const VMStateDescription vmstate_sparc_cpu; > #endif > > void sparc_cpu_do_interrupt(CPUState *cpu); -- Alex Benn=C3=A9e