From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43585) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bw9vR-0001Y3-Bc for qemu-devel@nongnu.org; Mon, 17 Oct 2016 11:34:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bw9vO-0005Bw-86 for qemu-devel@nongnu.org; Mon, 17 Oct 2016 11:34:05 -0400 Received: from mail-yw0-x236.google.com ([2607:f8b0:4002:c05::236]:33563) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1bw9vO-0005Bk-2a for qemu-devel@nongnu.org; Mon, 17 Oct 2016 11:34:02 -0400 Received: by mail-yw0-x236.google.com with SMTP id t192so119715401ywf.0 for ; Mon, 17 Oct 2016 08:34:01 -0700 (PDT) References: <1476214861-31658-1-git-send-email-rth@twiddle.net> <20161016223837.GB5587@flamenco> <87lgxnfkyo.fsf@linaro.org> <69deb297-fcc5-5324-0355-8b96b4df6848@twiddle.net> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <69deb297-fcc5-5324-0355-8b96b4df6848@twiddle.net> Date: Mon, 17 Oct 2016 16:33:59 +0100 Message-ID: <87insrf0rc.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v6 00/35] cmpxchg-based emulation of atomics List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: "Emilio G. Cota" , qemu-devel@nongnu.org Richard Henderson writes: > On 10/17/2016 01:17 AM, Alex Bennée wrote: >> >> Emilio G. Cota writes: >> >>> On Tue, Oct 11, 2016 at 14:40:26 -0500, Richard Henderson wrote: >>>> Sixth time is the charm, right? This time I'm certain that it >>>> compiles with centos6, and contains the previously missing update >>>> from Emilio to atomic_add-bench. >>> >>> For patches 03-16 (including the elusive patch 06 for which I reviewed 1bfe0cdf8 >>> from your atomic-4 branch on github): >>> >>> Reviewed-by: Emilio G. Cota >>> >>> I just tested the patchset by running concurrencykit's ck_pr regression test (which >>> tests lock'ed ops) for [guest-on-host bits, all x86] 64-on-64, 32-on-32 and >>> 64-on-32. I ran it with TCG debugging enabled. It passes all tests. ^^^^^^^^^^^^^^^^^^^^^ >> >> How odd, did you not see the double temp free for target-arm/translate.c? > > Free just sets a bit in a bitmap, so a double-free isn't visible without the > --enable-debug-tcg assertion. ^^^^^^^^^^^^^^^^ That's why I was confused, I thought Emilio had it enabled. -- Alex Bennée