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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org,
	qemu-devel@nongnu.org, crosthwaitepeter@gmail.com,
	edgar.iglesias@gmail.com, afaerber@suse.de,
	fred.konrad@greensocs.com
Subject: Re: [Qemu-devel] [PATCH v4 07/16] register: Add block initialise helper
Date: Mon, 29 Feb 2016 11:28:44 +0000	[thread overview]
Message-ID: <87io17kb6b.fsf@linaro.org> (raw)
In-Reply-To: <32e6f2f10d2394ce59543e0fc5f5ef63203cfede.1455055858.git.alistair.francis@xilinx.com>


Alistair Francis <alistair.francis@xilinx.com> writes:

> From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>
> Add a helper that will scan a static RegisterAccessInfo Array
> and populate a container MemoryRegion with registers as defined.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> V3:
>  - Fix typo
> V2:
>  - Use memory_region_add_subregion_no_print()
>
>  hw/core/register.c    | 29 +++++++++++++++++++++++++++++
>  include/hw/register.h | 20 ++++++++++++++++++++
>  2 files changed, 49 insertions(+)
>
> diff --git a/hw/core/register.c b/hw/core/register.c
> index d766517..ac866f6 100644
> --- a/hw/core/register.c
> +++ b/hw/core/register.c
> @@ -210,6 +210,35 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size)
>      return register_read_memory(opaque, addr, size, false);
>  }
>
> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
> +                           int num, RegisterInfo *ri, uint32_t *data,
> +                           MemoryRegion *container, const MemoryRegionOps *ops,
> +                           bool debug_enabled)
> +{
> +    const char *debug_prefix = object_get_typename(OBJECT(owner));
> +    int i;
> +
> +    for (i = 0; i < num; i++) {
> +        int index = rae[i].decode.addr / 4;
> +        RegisterInfo *r = &ri[index];
> +
> +        *r = (RegisterInfo) {
> +            .data = &data[index],
> +            .data_size = sizeof(uint32_t),
> +            .access = &rae[i],
> +            .debug = debug_enabled,
> +            .prefix = debug_prefix,
> +            .opaque = owner,
> +        };
> +        register_init(r);
> +
> +        memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->access->name,
> +                              sizeof(uint32_t));
> +        memory_region_add_subregion_no_print(container,
> +                                             r->access->decode.addr,
> &r->mem);

As I mentioned in the previous patch I think having a subregion
per-register is excessive. I think you need single io region with the
private data giving a structure with the list of registers in the block.
You can then have a general purpose set of register ops to lookup the
eventual register and dispatch to the handler.

> +    }
> +}
> +
>  static const TypeInfo register_info = {
>      .name  = TYPE_REGISTER,
>      .parent = TYPE_DEVICE,
> diff --git a/include/hw/register.h b/include/hw/register.h
> index d3469c6..6ac005c 100644
> --- a/include/hw/register.h
> +++ b/include/hw/register.h
> @@ -162,6 +162,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value,
>  uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size);
>  uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size);
>
> +/**
> + * Init a block of consecutive registers into a container MemoryRegion. A
> + * number of constant register definitions are parsed to create a corresponding
> + * array of RegisterInfo's.
> + *
> + * @owner: device owning the registers
> + * @rae: Register definitions to init
> + * @num: number of registers to init (length of @rae)
> + * @ri: Register array to init
> + * @data: Array to use for register data
> + * @container: Memory region to contain new registers
> + * @ops: Memory region ops to access registers.
> + * @debug enabled: turn on/off verbose debug information
> + */
> +
> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
> +                           int num, RegisterInfo *ri, uint32_t *data,
> +                           MemoryRegion *container, const MemoryRegionOps *ops,
> +                           bool debug_enabled);
> +
>  /* Define constants for a 32 bit register */
>  #define REG32(reg, addr)                                                  \
>      enum { A_ ## reg = (addr) };                                          \


--
Alex Bennée

  reply	other threads:[~2016-02-29 11:28 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-09 22:14 [Qemu-devel] [PATCH v4 00/16] data-driven device registers Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 01/16] memory: Allow subregions to not be printed by info mtree Alistair Francis
2016-02-26 16:51   ` Alex Bennée
2016-02-26 16:54     ` Peter Maydell
2016-03-08  0:49       ` Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 02/16] register: Add Register API Alistair Francis
2016-02-26 17:13   ` Alex Bennée
2016-03-08  0:54     ` Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 03/16] register: Add Memory API glue Alistair Francis
2016-02-26 17:25   ` Alex Bennée
2016-03-08  1:18     ` Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 04/16] register: Add support for decoding information Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 05/16] register: Define REG and FIELD macros Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 06/16] register: QOMify Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 07/16] register: Add block initialise helper Alistair Francis
2016-02-29 11:28   ` Alex Bennée [this message]
2016-03-08  0:09     ` Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 08/16] bitops: Add ONES macro Alistair Francis
2016-02-29 11:51   ` Alex Bennée
2016-03-04 22:42     ` Alistair Francis
2016-02-09 22:14 ` [Qemu-devel] [PATCH v4 09/16] dma: Add Xilinx Zynq devcfg device model Alistair Francis
2016-02-29 12:20   ` Alex Bennée
2016-03-04 19:41     ` Alistair Francis
2016-02-09 22:15 ` [Qemu-devel] [PATCH v4 11/16] qdev: Define qdev_get_gpio_out Alistair Francis
2016-02-09 22:15 ` [Qemu-devel] [PATCH v4 12/16] qdev: Add qdev_pass_all_gpios API Alistair Francis
2016-02-09 22:15 ` [Qemu-devel] [PATCH v4 13/16] irq: Add opaque setter routine Alistair Francis
2016-02-09 22:15 ` [Qemu-devel] [PATCH v4 14/16] register: Add GPIO API Alistair Francis
2016-02-29 12:22   ` Alex Bennée
2016-03-04 18:47     ` Alistair Francis
2016-02-09 22:15 ` [Qemu-devel] [PATCH v4 15/16] misc: Introduce ZynqMP IOU SLCR Alistair Francis
2016-02-09 22:15 ` [Qemu-devel] [PATCH v4 16/16] xlnx-zynqmp: Connect the " Alistair Francis
2016-02-26 16:15 ` [Qemu-devel] [PATCH v4 00/16] data-driven device registers Alex Bennée
2016-02-29 12:26 ` Alex Bennée
2016-03-03 21:27   ` Alistair Francis
2016-03-08  1:21     ` Alistair Francis

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