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Thu, 29 Aug 2024 10:03:40 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Pierrick Bouvier Cc: qemu-devel@nongnu.org, Alexandre Iooss , Zhao Liu , Mahmoud Mandour , Yanan Wang , Eduardo Habkost , Paolo Bonzini , Philippe =?utf-8?Q?Mathieu-Daud?= =?utf-8?Q?=C3=A9?= , Richard Henderson , Marcel Apfelbaum , Xingtao Yao Subject: Re: [PATCH v7 6/6] tests/tcg/multiarch: add test for plugin memory access In-Reply-To: <20240724194708.1843704-7-pierrick.bouvier@linaro.org> (Pierrick Bouvier's message of "Wed, 24 Jul 2024 12:47:08 -0700") References: <20240724194708.1843704-1-pierrick.bouvier@linaro.org> <20240724194708.1843704-7-pierrick.bouvier@linaro.org> Date: Thu, 29 Aug 2024 10:03:40 +0100 Message-ID: <87jzfz3dlf.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Pierrick Bouvier writes: > Add an explicit test to check expected memory values are read/written. > 8,16,32 load/store are tested for all arch. > 64,128 load/store are tested for aarch64/x64. > atomic operations (8,16,32,64) are tested for x64 only. > > By default, atomic accesses are non atomic if a single cpu is running, > so we force creation of a second one by creating a new thread first. > > load/store helpers code path can't be triggered easily in user mode (no > softmmu), so we can't test it here. > > Output of test-plugin-mem-access.c is the list of expected patterns in > plugin output. By reading stdout, we can compare to plugins output and > have a multiarch test. > > Can be run with: > make -C build/tests/tcg/$ARCH-linux-user run-plugin-test-plugin-mem-acces= s-with-libmem.so > > Tested-by: Xingtao Yao > Signed-off-by: Pierrick Bouvier > --- > tests/tcg/multiarch/test-plugin-mem-access.c | 175 ++++++++++++++++++ > tests/tcg/multiarch/Makefile.target | 7 + > .../tcg/multiarch/check-plugin-mem-access.sh | 30 +++ > 3 files changed, 212 insertions(+) > create mode 100644 tests/tcg/multiarch/test-plugin-mem-access.c > create mode 100755 tests/tcg/multiarch/check-plugin-mem-access.sh > > diff --git a/tests/tcg/multiarch/test-plugin-mem-access.c b/tests/tcg/mul= tiarch/test-plugin-mem-access.c > new file mode 100644 > index 00000000000..09d1fa22e35 > --- /dev/null > +++ b/tests/tcg/multiarch/test-plugin-mem-access.c > @@ -0,0 +1,175 @@ > +/* > + * SPDX-License-Identifier: GPL-2.0-or-later > + * > + * Check if we detect all memory accesses expected using plugin API. > + * Used in conjunction with ./check-plugin-mem-access.sh check script. > + * Output of this program is the list of patterns expected in plugin out= put. > + * > + * 8,16,32 load/store are tested for all arch. > + * 64,128 load/store are tested for aarch64/x64. > + * atomic operations (8,16,32,64) are tested for x64 only. > + */ It would be nice to build this for the softmmu path as well. I'm not sure if this can be done with as single source or we need a second test. I shall have a play. > + > +#include > +#include > +#include > +#include > + > +#if defined(__x86_64__) > +#include > +#elif defined(__aarch64__) > +#include > +#endif /* __x86_64__ */ > + > +static void *data; > + > +/* ,store_u8,.*,8,store,0xf1 */ > +#define PRINT_EXPECTED(function, type, value, action) \ > +do { \ > + printf(",%s,.*,%d,%s,%s\n", \ > + #function, (int) sizeof(type) * 8, action, value); \ > +} \ > +while (0) > + > +#define DEFINE_STORE(name, type, value) \ > + \ > +static void print_expected_store_##name(void) \ > +{ \ > + PRINT_EXPECTED(store_##name, type, #value, "store"); \ > +} \ > + \ > +static void store_##name(void) \ > +{ \ > + *((type *)data) =3D value; \ > + print_expected_store_##name(); \ > +} > + > +#define DEFINE_ATOMIC_OP(name, type, value) \ > + \ > +static void print_expected_atomic_op_##name(void) \ > +{ \ > + PRINT_EXPECTED(atomic_op_##name, type, "0x0*42", "load"); \ > + PRINT_EXPECTED(atomic_op_##name, type, #value, "store"); \ > +} \ > + \ > +static void atomic_op_##name(void) \ > +{ \ > + *((type *)data) =3D 0x42; \ > + __sync_val_compare_and_swap((type *)data, 0x42, value); \ > + print_expected_atomic_op_##name(); \ > +} > + > +#define DEFINE_LOAD(name, type, value) \ > + \ > +static void print_expected_load_##name(void) \ > +{ \ > + PRINT_EXPECTED(load_##name, type, #value, "load"); \ > +} \ > + \ > +static void load_##name(void) \ > +{ \ > + type src =3D *((type *) data); \ > + type dest =3D src; \ > + (void)src, (void)dest; \ > + print_expected_load_##name(); \ > +} > + > +DEFINE_STORE(u8, uint8_t, 0xf1) > +DEFINE_LOAD(u8, uint8_t, 0xf1) > +DEFINE_STORE(u16, uint16_t, 0xf123) > +DEFINE_LOAD(u16, uint16_t, 0xf123) > +DEFINE_STORE(u32, uint32_t, 0xff112233) > +DEFINE_LOAD(u32, uint32_t, 0xff112233) > + > +#if defined(__x86_64__) || defined(__aarch64__) > +DEFINE_STORE(u64, uint64_t, 0xf123456789abcdef) > +DEFINE_LOAD(u64, uint64_t, 0xf123456789abcdef) > + > +static void print_expected_store_u128(void) > +{ > + PRINT_EXPECTED(store_u128, __int128, > + "0xf122334455667788f123456789abcdef", "store"); > +} > + > +static void store_u128(void) > +{ > +#ifdef __x86_64__ > + _mm_store_si128(data, _mm_set_epi32(0xf1223344, 0x55667788, > + 0xf1234567, 0x89abcdef)); > +#else > + const uint32_t init[4] =3D {0x89abcdef, 0xf1234567, 0x55667788, 0xf1= 223344}; > + uint32x4_t vec =3D vld1q_u32(init); > + vst1q_u32(data, vec); > +#endif /* __x86_64__ */ > + print_expected_store_u128(); > +} > + > +static void print_expected_load_u128(void) > +{ > + PRINT_EXPECTED(load_u128, __int128, > + "0xf122334455667788f123456789abcdef", "load"); > +} > + > +static void load_u128(void) > +{ > +#ifdef __x86_64__ > + __m128i var =3D _mm_load_si128(data); > +#else > + uint32x4_t var =3D vld1q_u32(data); > +#endif > + (void) var; > + print_expected_load_u128(); > +} > +#endif /* __x86_64__ || __aarch64__ */ > + > +#if defined(__x86_64__) > +DEFINE_ATOMIC_OP(u8, uint8_t, 0xf1) > +DEFINE_ATOMIC_OP(u16, uint16_t, 0xf123) > +DEFINE_ATOMIC_OP(u32, uint32_t, 0xff112233) > +DEFINE_ATOMIC_OP(u64, uint64_t, 0xf123456789abcdef) > +#endif /* __x86_64__ */ > + > +static void *f(void *p) > +{ > + return NULL; > +} > + > +int main(void) > +{ > + /* > + * We force creation of a second thread to enable cpu flag CF_PARALL= EL. > + * This will generate atomic operations when needed. > + */ > + pthread_t thread; > + pthread_create(&thread, NULL, &f, NULL); > + pthread_join(thread, NULL); > + > + /* allocate storage up to 128 bits */ > + data =3D malloc(16); > + > + store_u8(); > + load_u8(); > + > + store_u16(); > + load_u16(); > + > + store_u32(); > + load_u32(); > + > +#if defined(__x86_64__) || defined(__aarch64__) > + store_u64(); > + load_u64(); > + > + store_u128(); > + load_u128(); > +#endif /* __x86_64__ || __aarch64__ */ > + > +#if defined(__x86_64__) > + atomic_op_u8(); > + atomic_op_u16(); > + atomic_op_u32(); > + atomic_op_u64(); > +#endif /* __x86_64__ */ > + > + free(data); > +} > diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Ma= kefile.target > index 5e3391ec9d2..d90cbd3e521 100644 > --- a/tests/tcg/multiarch/Makefile.target > +++ b/tests/tcg/multiarch/Makefile.target > @@ -170,5 +170,12 @@ run-plugin-semiconsole-with-%: > TESTS +=3D semihosting semiconsole > endif >=20=20 > +# Test plugin memory access instrumentation > +run-plugin-test-plugin-mem-access-with-libmem.so: \ > + PLUGIN_ARGS=3D$(COMMA)print-accesses=3Dtrue > +run-plugin-test-plugin-mem-access-with-libmem.so: \ > + CHECK_PLUGIN_OUTPUT_COMMAND=3D \ > + $(SRC_PATH)/tests/tcg/multiarch/check-plugin-mem-access.sh > + > # Update TESTS > TESTS +=3D $(MULTIARCH_TESTS) > diff --git a/tests/tcg/multiarch/check-plugin-mem-access.sh b/tests/tcg/m= ultiarch/check-plugin-mem-access.sh > new file mode 100755 > index 00000000000..909606943bb > --- /dev/null > +++ b/tests/tcg/multiarch/check-plugin-mem-access.sh > @@ -0,0 +1,30 @@ > +#!/usr/bin/env bash > + > +set -euo pipefail > + > +die() > +{ > + echo "$@" 1>&2 > + exit 1 > +} > + > +check() > +{ > + file=3D$1 > + pattern=3D$2 > + grep "$pattern" "$file" > /dev/null || die "\"$pattern\" not found i= n $file" > +} > + > +[ $# -eq 1 ] || die "usage: plugin_out_file" > + > +plugin_out=3D$1 > + > +expected() > +{ > + ./test-plugin-mem-access || > + die "running test-plugin-mem-access executable failed" I'm confused by this. We seem to be running the test again and this is going to fail if binfmt_misc isn't setup (which we don't assume for running the TCG tests). > +} > + > +expected | while read line; do > + check "$plugin_out" "$line" > +done --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro