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Wed, 19 Oct 2022 14:47:11 +0100 (BST) References: <4672400c-0084-3bf3-a596-7a42115301f0@linux.alibaba.com> <87lepeeno0.fsf@linaro.org> <4841b154-bd05-c677-cfb4-46a350ddd0aa@linux.alibaba.com> <020dc51f-793b-bf20-41e8-5b1447711864@linux.alibaba.com> User-agent: mu4e 1.9.1; emacs 28.2.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: LIU Zhiwei Cc: Richard Henderson , "open list:RISC-V" , Alistair Francis , qemu-devel@nongnu.org Subject: Re: Question about TCG backend correctness Date: Wed, 19 Oct 2022 14:46:01 +0100 In-reply-to: <020dc51f-793b-bf20-41e8-5b1447711864@linux.alibaba.com> Message-ID: <87k04wapsw.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" LIU Zhiwei writes: > On 2022/10/18 13:22, Richard Henderson wrote: > > On 10/18/22 01:27, LIU Zhiwei wrote:=20 > > Maybe I can run RISU on qemu-aarch64(x86) and qemu-aarch64(risc-v) to ch= eck the RISC-V backend.=20 > > This is a good start for debugging a tcg backend.=20 > > After fixing some bugs, RISU can run some instructions now. Thanks. > > IMHO, the next 2 requests should be satisfied for TCG test. > > 1. Add a unit test case for any lower level and small function is easy.=20 > > For example, the function in risc-v backend,=20 > > static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg = arg) > { > if (ret =3D=3D arg) { > return true; > } > switch (type) { > case TCG_TYPE_I32: > case TCG_TYPE_I64: > tcg_out_opc_imm(s, OPC_ADDI, ret, arg, 0); > break; > default: > g_assert_not_reached(); > } > return true; > } > > Write a unit test case for it is not easy currently. I don't know how t= o fill the TCGContext struct and other > parameters. > And there is no test framework where I can reuse. > > The others may say that we can run a lot of benchmark to ensure we have = a good coverage and don't > need such a low level test case. Some reasonable. But it will lead to a = very high test burden and it is very hard to > get > a good coverage only through high level test. You can at the very least use the gcov build to identify which bits of the backend are not exercised by "check-tcg" and maybe write a few more tests to fill it in. It's not a direct exercising of the code but it at least ensures it has run and worked at least once. > > 2. Add a unit test case for any high level function is easy, such as tcg_= gen_code.=20 > > The check-tcg test belongs to the high level testing.=20 > > Best Regards=EF=BC=8C > Zhiwei > > It's not comprehensive, because RISU executes one instruction at a time = then raises an exception to check the > results. This means that the tcg optimizer doesn't have much to work wi= th, which means that the tcg backend is not > as stressed as it could be.=20 > > I've long wanted to have the ability to have TCG unit tests where a=20 > virtual processor could be defined for the purpose of directly=20 > exercising TCG.=20 > > We already have many ISAs as the front end of TCG. Will the virtual proc= essor here be some=20 > different?=20 > > It wouldn't. This is my argument against creating a new virtual process= or.=20 > > I do think we should be better about creating regression tests for bugs = fixed, in the form of small focused assembly > test cases which get run via check-tcg.=20 > > r~=20 --=20 Alex Benn=C3=A9e