From: "Alex Bennée" <alex.bennee@linaro.org>
To: Shashi Mallela <shashi.mallela@linaro.org>
Cc: peter.maydell@linaro.org, leif@nuviainc.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org, rad@semihalf.com
Subject: Re: [PATCH v1 0/8] GICv3 LPI and ITS feature implementation
Date: Thu, 25 Mar 2021 19:44:44 +0000 [thread overview]
Message-ID: <87k0pv10e5.fsf@linaro.org> (raw)
In-Reply-To: <20210323041238.133835-1-shashi.mallela@linaro.org>
Shashi Mallela <shashi.mallela@linaro.org> writes:
> This patchset implements qemu device model for enabling physical
> LPI support and ITS functionality in GIC as per GICv3 specification.
> Both flat table and 2 level tables are implemented.The ITS commands
> for adding/deleting ITS table entries,trigerring LPI interrupts are
> implemented.Translated LPI interrupt ids are processed by redistributor
> to determine priority and set pending state appropriately before
> forwarding the same to cpu interface.
> The ITS feature support has been added to sbsa-ref platform as well as
> virt platform,wherein the emulated functionality co-exists with kvm
> kernel functionality.
OK I've finished my first pass. I didn't want to keep repeating myself
with the later patches. So in summary:
- use REG/FIELD to avoid the manual mask definition/manipulation
- define registers in the patch that first uses them
- check LOG_UNIMP vs LOG_GUEST_ERROR (and possibly assert if it
shouldn't happen)
- and of course pass the kvm-unit-tests ITS tests ;-)
Thanks,
>
> Shashi Mallela (8):
> hw/intc: GICv3 ITS initial framework
> hw/intc: GICv3 ITS register definitions added
> hw/intc: GICv3 ITS command queue framework
> hw/intc: GICv3 ITS Command processing
> hw/intc: GICv3 ITS Feature enablement
> hw/intc: GICv3 redistributor ITS processing
> hw/arm/sbsa-ref: add ITS support in SBSA GIC
> hw/arm/virt: add ITS support in virt GIC
>
> hw/arm/sbsa-ref.c | 26 +-
> hw/arm/virt.c | 10 +-
> hw/intc/arm_gicv3.c | 6 +
> hw/intc/arm_gicv3_common.c | 16 +
> hw/intc/arm_gicv3_cpuif.c | 15 +-
> hw/intc/arm_gicv3_dist.c | 22 +-
> hw/intc/arm_gicv3_its.c | 1417 ++++++++++++++++++++
> hw/intc/arm_gicv3_its_common.c | 17 +-
> hw/intc/arm_gicv3_its_kvm.c | 2 +-
> hw/intc/arm_gicv3_redist.c | 155 ++-
> hw/intc/gicv3_internal.h | 176 ++-
> hw/intc/meson.build | 1 +
> include/hw/intc/arm_gicv3_common.h | 14 +
> include/hw/intc/arm_gicv3_its_common.h | 12 +-
> target/arm/kvm_arm.h | 4 +-
> 15 files changed, 1869 insertions(+), 24 deletions(-)
> create mode 100644 hw/intc/arm_gicv3_its.c
--
Alex Bennée
prev parent reply other threads:[~2021-03-25 19:51 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 4:12 [PATCH v1 0/8] GICv3 LPI and ITS feature implementation Shashi Mallela
2021-03-23 4:12 ` [PATCH v1 1/8] hw/intc: GICv3 ITS initial framework Shashi Mallela
2021-03-25 16:43 ` Alex Bennée
2021-03-25 17:18 ` Alex Bennée
2021-03-23 4:12 ` [PATCH v1 2/8] hw/intc: GICv3 ITS register definitions added Shashi Mallela
2021-03-25 19:34 ` Alex Bennée
2021-03-31 16:48 ` shashi.mallela
2021-03-31 23:31 ` Richard Henderson
2021-03-23 4:12 ` [PATCH v1 3/8] hw/intc: GICv3 ITS command queue framework Shashi Mallela
2021-03-23 4:12 ` [PATCH v1 4/8] hw/intc: GICv3 ITS Command processing Shashi Mallela
2021-03-23 4:12 ` [PATCH v1 5/8] hw/intc: GICv3 ITS Feature enablement Shashi Mallela
2021-03-23 4:12 ` [PATCH v1 6/8] hw/intc: GICv3 redistributor ITS processing Shashi Mallela
2021-03-23 4:12 ` [PATCH v1 7/8] hw/arm/sbsa-ref: add ITS support in SBSA GIC Shashi Mallela
2021-03-23 4:12 ` [PATCH v1 8/8] hw/arm/virt: add ITS support in virt GIC Shashi Mallela
2021-03-25 17:59 ` [PATCH v1 0/8] GICv3 LPI and ITS feature implementation Alex Bennée
2021-03-25 19:44 ` Alex Bennée [this message]
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