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Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Joseph Myers writes: > Conversions between IEEE floating-point formats should convert > signaling NaNs to quiet NaNs. Most of those in QEMU's softfloat code > do so, but those for floatx80 fail to. Fix those conversions to > silence signaling NaNs as well. I realised we hadn't enabled float-to-float tests for check-softfloat so with this applied: --8<---------------cut here---------------start------------->8--- tests/tcg: add check-softfloat-conv-f2f Signed-off-by: Alex Benn=C3=A9e 1 file changed, 17 insertions(+), 1 deletion(-) tests/Makefile.include | 18 +++++++++++++++++- modified tests/Makefile.include @@ -687,7 +687,23 @@ test-softfloat =3D $(call quiet-command, \ (cat $2.out && exit 1;), \ "FLOAT TEST", $2) =20 -# Conversion Routines: +# Conversion Routines: Float to Float +# FIXME: f32_to_f128 (broken) +check-softfloat-conv-f2f: $(FP_TEST_BIN) + $(call test-softfloat, \ + f16_to_f32 f16_to_f64 \ + f16_to_extF80 f16_to_f128 \ + f32_to_f16 f32_to_f64 \ + f32_to_extF80 \ + f64_to_f16 f64_to_f32 \ + f64_to_extF80 f64_to_f128 \ + extF80_to_f16 extF80_to_f32 \ + extF80_to_f64 extF80_to_f128 \ + f128_to_f16 f128_to_f32 \ + f128_to_f64 f128_to_extF80, \ + float-to-float) + +# Conversion Routines: Float to Float # FIXME: i32_to_extF80 (broken), i64_to_extF80 (broken) # ui32_to_f128 (not implemented), extF80_roundToInt (broken) # --8<---------------cut here---------------end--------------->8--- I still see some failures for: f64_to_extF80 f128_to_extF80 (as well as other conversions you've not touched). Ideally we want to convert the extF80 and f128 code to use the newer FloatParts code which is pretty robustly tested now. However the trick would be finding a way to do that that doesn't involve break or regressing the performance for the f16/32/64 cases. Just using a union causes all sorts of problems. Anyway I'd settle for fixing the old style code and enabling the tests we can. > > Signed-off-by: Joseph Myers > --- > fpu/softfloat.c | 24 ++++++++++++++++++------ > 1 file changed, 18 insertions(+), 6 deletions(-) > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index ae6ba71854..ac116c70b8 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -4498,7 +4498,9 @@ floatx80 float32_to_floatx80(float32 a, float_statu= s *status) > aSign =3D extractFloat32Sign( a ); > if ( aExp =3D=3D 0xFF ) { > if (aSig) { > - return commonNaNToFloatx80(float32ToCommonNaN(a, status), st= atus); > + floatx80 res =3D commonNaNToFloatx80(float32ToCommonNaN(a, s= tatus), > + status); > + return floatx80_silence_nan(res, status); > } > return packFloatx80(aSign, > floatx80_infinity_high, > @@ -5016,7 +5018,9 @@ floatx80 float64_to_floatx80(float64 a, float_statu= s *status) > aSign =3D extractFloat64Sign( a ); > if ( aExp =3D=3D 0x7FF ) { > if (aSig) { > - return commonNaNToFloatx80(float64ToCommonNaN(a, status), st= atus); > + floatx80 res =3D commonNaNToFloatx80(float64ToCommonNaN(a, s= tatus), > + status); > + return floatx80_silence_nan(res, status); > } > return packFloatx80(aSign, > floatx80_infinity_high, > @@ -5618,7 +5622,9 @@ float32 floatx80_to_float32(floatx80 a, float_statu= s *status) > aSign =3D extractFloatx80Sign( a ); > if ( aExp =3D=3D 0x7FFF ) { > if ( (uint64_t) ( aSig<<1 ) ) { > - return commonNaNToFloat32(floatx80ToCommonNaN(a, status), st= atus); > + float32 res =3D commonNaNToFloat32(floatx80ToCommonNaN(a, st= atus), > + status); > + return float32_silence_nan(res, status); > } > return packFloat32( aSign, 0xFF, 0 ); > } > @@ -5650,7 +5656,9 @@ float64 floatx80_to_float64(floatx80 a, float_statu= s *status) > aSign =3D extractFloatx80Sign( a ); > if ( aExp =3D=3D 0x7FFF ) { > if ( (uint64_t) ( aSig<<1 ) ) { > - return commonNaNToFloat64(floatx80ToCommonNaN(a, status), st= atus); > + float64 res =3D commonNaNToFloat64(floatx80ToCommonNaN(a, st= atus), > + status); > + return float64_silence_nan(res, status); > } > return packFloat64( aSign, 0x7FF, 0 ); > } > @@ -5681,7 +5689,9 @@ float128 floatx80_to_float128(floatx80 a, float_sta= tus *status) > aExp =3D extractFloatx80Exp( a ); > aSign =3D extractFloatx80Sign( a ); > if ( ( aExp =3D=3D 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) { > - return commonNaNToFloat128(floatx80ToCommonNaN(a, status), statu= s); > + float128 res =3D commonNaNToFloat128(floatx80ToCommonNaN(a, stat= us), > + status); > + return float128_silence_nan(res, status); > } > shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 ); > return packFloat128( aSign, aExp, zSig0, zSig1 ); > @@ -6959,7 +6969,9 @@ floatx80 float128_to_floatx80(float128 a, float_sta= tus *status) > aSign =3D extractFloat128Sign( a ); > if ( aExp =3D=3D 0x7FFF ) { > if ( aSig0 | aSig1 ) { > - return commonNaNToFloatx80(float128ToCommonNaN(a, status), s= tatus); > + floatx80 res =3D commonNaNToFloatx80(float128ToCommonNaN(a, = status), > + status); > + return floatx80_silence_nan(res, status); > } > return packFloatx80(aSign, floatx80_infinity_high, > floatx80_infinity_low); > --=20 > 2.17.1 --=20 Alex Benn=C3=A9e