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X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair.francis@wdc.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > We do not need the entire CPUArchState to compute these values. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e > --- > accel/tcg/cputlb.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c > index e4a8ed9534..49c605b6d8 100644 > --- a/accel/tcg/cputlb.c > +++ b/accel/tcg/cputlb.c > @@ -80,14 +80,14 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_o= n_cpu_data)); > QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16); > #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1) >=20=20 > -static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) > +static inline size_t tlb_n_entries(CPUTLBDescFast *fast) > { > - return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1; > + return (fast->mask >> CPU_TLB_ENTRY_BITS) + 1; > } >=20=20 > -static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx) > +static inline size_t sizeof_tlb(CPUTLBDescFast *fast) > { > - return env_tlb(env)->f[mmu_idx].mask + (1 << CPU_TLB_ENTRY_BITS); > + return fast->mask + (1 << CPU_TLB_ENTRY_BITS); > } >=20=20 > static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, > @@ -156,7 +156,7 @@ static void tlb_dyn_init(CPUArchState *env) > static void tlb_mmu_resize_locked(CPUArchState *env, int mmu_idx) > { > CPUTLBDesc *desc =3D &env_tlb(env)->d[mmu_idx]; > - size_t old_size =3D tlb_n_entries(env, mmu_idx); > + size_t old_size =3D tlb_n_entries(&env_tlb(env)->f[mmu_idx]); > size_t rate; > size_t new_size =3D old_size; > int64_t now =3D get_clock_realtime(); > @@ -236,7 +236,8 @@ static void tlb_flush_one_mmuidx_locked(CPUArchState = *env, int mmu_idx) > env_tlb(env)->d[mmu_idx].large_page_addr =3D -1; > env_tlb(env)->d[mmu_idx].large_page_mask =3D -1; > env_tlb(env)->d[mmu_idx].vindex =3D 0; > - memset(env_tlb(env)->f[mmu_idx].table, -1, sizeof_tlb(env, mmu_idx)); > + memset(env_tlb(env)->f[mmu_idx].table, -1, > + sizeof_tlb(&env_tlb(env)->f[mmu_idx])); > memset(env_tlb(env)->d[mmu_idx].vtable, -1, > sizeof(env_tlb(env)->d[0].vtable)); > } > @@ -622,7 +623,7 @@ void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1= , ram_addr_t length) > qemu_spin_lock(&env_tlb(env)->c.lock); > for (mmu_idx =3D 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { > unsigned int i; > - unsigned int n =3D tlb_n_entries(env, mmu_idx); > + unsigned int n =3D tlb_n_entries(&env_tlb(env)->f[mmu_idx]); >=20=20 > for (i =3D 0; i < n; i++) { > tlb_reset_dirty_range_locked(&env_tlb(env)->f[mmu_idx].table= [i], --=20 Alex Benn=C3=A9e