From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40406) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UePZ5-0004Tq-W8 for qemu-devel@nongnu.org; Mon, 20 May 2013 08:51:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UePZ4-0004v6-T4 for qemu-devel@nongnu.org; Mon, 20 May 2013 08:51:47 -0400 Received: from mail-ob0-x230.google.com ([2607:f8b0:4003:c01::230]:52082) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UePZ4-0004uw-NT for qemu-devel@nongnu.org; Mon, 20 May 2013 08:51:46 -0400 Received: by mail-ob0-f176.google.com with SMTP id wp18so6841765obc.7 for ; Mon, 20 May 2013 05:51:45 -0700 (PDT) From: Anthony Liguori In-Reply-To: <20130519140011.GA29191@redhat.com> References: <20130513201840.5430.86331.stgit@bling.home> <20130519140011.GA29191@redhat.com> Date: Mon, 20 May 2013 07:51:40 -0500 Message-ID: <87k3mtke5f.fsf@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: Re: [Qemu-devel] [PATCH v2] pci-assign: Add MSI affinity support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" , Alex Williamson Cc: jan.kiszka@siemens.com, qemu-devel@nongnu.org "Michael S. Tsirkin" writes: > On Mon, May 13, 2013 at 02:20:02PM -0600, Alex Williamson wrote: >> To support guest MSI affinity changes update the MSI message any time >> the guest writes to the address or data fields. >> >> Signed-off-by: Alex Williamson > > Seems the only way we can fix this for 1.5. > > Acked-by: Michael S. Tsirkin Is this a bug or a feature? Can someone describe the scenario in which the bug occurs? Regards, Anthony Liguori > >> --- >> >> v2: Don't cache MSIMessage >> >> hw/i386/kvm/pci-assign.c | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c >> index c1e08ec..ff85590 100644 >> --- a/hw/i386/kvm/pci-assign.c >> +++ b/hw/i386/kvm/pci-assign.c >> @@ -1026,6 +1026,21 @@ static void assigned_dev_update_msi(PCIDevice *pci_dev) >> } >> } >> >> +static void assigned_dev_update_msi_msg(PCIDevice *pci_dev) >> +{ >> + AssignedDevice *assigned_dev = DO_UPCAST(AssignedDevice, dev, pci_dev); >> + uint8_t ctrl_byte = pci_get_byte(pci_dev->config + pci_dev->msi_cap + >> + PCI_MSI_FLAGS); >> + >> + if (assigned_dev->assigned_irq_type != ASSIGNED_IRQ_MSI || >> + !(ctrl_byte & PCI_MSI_FLAGS_ENABLE)) { >> + return; >> + } >> + >> + kvm_irqchip_update_msi_route(kvm_state, assigned_dev->msi_virq[0], >> + msi_get_message(pci_dev, 0)); >> +} >> + >> static bool assigned_dev_msix_masked(MSIXTableEntry *entry) >> { >> return (entry->ctrl & cpu_to_le32(0x1)) != 0; >> @@ -1201,6 +1216,9 @@ static void assigned_dev_pci_write_config(PCIDevice *pci_dev, uint32_t address, >> if (range_covers_byte(address, len, >> pci_dev->msi_cap + PCI_MSI_FLAGS)) { >> assigned_dev_update_msi(pci_dev); >> + } else if (ranges_overlap(address, len, /* 32bit MSI only */ >> + pci_dev->msi_cap + PCI_MSI_ADDRESS_LO, 6)) { >> + assigned_dev_update_msi_msg(pci_dev); >> } >> } >> if (assigned_dev->cap.available & ASSIGNED_DEVICE_CAP_MSIX) {