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From: Fabiano Rosas <farosas@suse.de>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Claudio Fontana" <cfontana@suse.de>,
	"Eduardo Habkost" <ehabkost@redhat.com>
Subject: Re: [PATCH 5/5] target/arm: only perform TCG cpu and machine inits if TCG enabled
Date: Mon, 19 Dec 2022 12:16:09 -0300	[thread overview]
Message-ID: <87len38lvq.fsf@suse.de> (raw)
In-Reply-To: <42c455aa-c93f-9167-59ef-ddf2b46ca2e4@linaro.org>

Richard Henderson <richard.henderson@linaro.org> writes:

> On 12/16/22 13:29, Fabiano Rosas wrote:
>> -    /*
>> -     * Misaligned thumb pc is architecturally impossible.
>> -     * We have an assert in thumb_tr_translate_insn to verify this.
>> -     * Fail an incoming migrate to avoid this assert.
>> -     */
>> -    if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) {
>> -        return -1;
>> -    }
>> +        /*
>> +         * Misaligned thumb pc is architecturally impossible.
>> +         * We have an assert in thumb_tr_translate_insn to verify this.
>> +         * Fail an incoming migrate to avoid this assert.
>> +         */
>> +        if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) {
>> +            return -1;
>> +        }
>
> This is a sanity check rejecting malformed vmsave.  While hw virt won't have the same 
> assert as mentioned in the comment, it won't be happy and will raise some sort of cpu 
> exception later.  I think it's better to reject the bad vmload early.  I suppose we could 
> expand the comment to that effect, so that it doesn't appear to be wholly tcg inspired.

I see, I'll leave it out of tcg_enabled() and update the comment.

> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~


      reply	other threads:[~2022-12-19 15:16 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-16 21:29 [PATCH 0/5] target/arm: Some CONFIG_TCG code movement Fabiano Rosas
2022-12-16 21:29 ` [PATCH 1/5] target/arm: only build psci for TCG Fabiano Rosas
2022-12-16 21:59   ` Alexander Graf
2022-12-19  8:37     ` Claudio Fontana
2022-12-19 10:47       ` Alexander Graf
2022-12-19 10:55         ` Claudio Fontana
2022-12-19 11:42           ` Fabiano Rosas
2022-12-20  7:31             ` Alexander Graf
2022-12-20 13:53               ` Fabiano Rosas
2022-12-20 17:04                 ` Alexander Graf
2022-12-20 19:52                   ` Fabiano Rosas
2022-12-16 21:29 ` [PATCH 2/5] target/arm: rename handle_semihosting to tcg_handle_semihosting Fabiano Rosas
2022-12-17  0:02   ` Richard Henderson
2022-12-16 21:29 ` [PATCH 3/5] target/arm: wrap semihosting and psci calls with tcg_enabled Fabiano Rosas
2022-12-17  0:13   ` Richard Henderson
2022-12-19 11:54     ` Fabiano Rosas
2022-12-16 21:29 ` [PATCH 4/5] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Fabiano Rosas
2022-12-16 21:29 ` [PATCH 5/5] target/arm: only perform TCG cpu and machine inits if TCG enabled Fabiano Rosas
2022-12-17  0:20   ` Richard Henderson
2022-12-19 15:16     ` Fabiano Rosas [this message]

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