qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Shashi Mallela <shashi.mallela@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 13/26] hw/intc/arm_gicv3_its: Use FIELD macros for CTEs
Date: Mon, 13 Dec 2021 13:08:42 +0000	[thread overview]
Message-ID: <87lf0olkge.fsf@linaro.org> (raw)
In-Reply-To: <20211211191135.1764649-14-peter.maydell@linaro.org>


Peter Maydell <peter.maydell@linaro.org> writes:

> Use FIELD macros to handle CTEs, rather than ad-hoc mask-and-shift.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/intc/gicv3_internal.h | 3 ++-
>  hw/intc/arm_gicv3_its.c  | 7 ++++---
>  2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h
> index 14e8ef68e02..1eeb99035da 100644
> --- a/hw/intc/gicv3_internal.h
> +++ b/hw/intc/gicv3_internal.h
> @@ -403,7 +403,8 @@ FIELD(DTE, ITTADDR, 6, 44)
>   * Valid = 1 bit, RDBase = 16 bits
>   */
>  #define GITS_CTE_SIZE                 (0x8ULL)
> -#define GITS_CTE_RDBASE_PROCNUM_MASK  MAKE_64BIT_MASK(1, RDBASE_PROCNUM_LENGTH)
> +FIELD(CTE, VALID, 0, 1)
> +FIELD(CTE, RDBASE, 1, RDBASE_PROCNUM_LENGTH)
>  
>  /* Special interrupt IDs */
>  #define INTID_SECURE 1020
> diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
> index d6637229479..ab6ce09dbc2 100644
> --- a/hw/intc/arm_gicv3_its.c
> +++ b/hw/intc/arm_gicv3_its.c
> @@ -104,7 +104,7 @@ static bool get_cte(GICv3ITSState *s, uint16_t icid, uint64_t *cte,
>                                        MEMTXATTRS_UNSPECIFIED, res);
>      }
>  
> -    return (*cte & TABLE_ENTRY_VALID_MASK) != 0;
> +    return FIELD_EX64(*cte, CTE, VALID);
>  }
>  
>  static bool update_ite(GICv3ITSState *s, uint32_t eventid, uint64_t dte,
> @@ -308,7 +308,7 @@ static bool process_its_cmd(GICv3ITSState *s, uint64_t value, uint32_t offset,
>           * Current implementation only supports rdbase == procnum
>           * Hence rdbase physical address is ignored
>           */
> -        rdbase = (cte & GITS_CTE_RDBASE_PROCNUM_MASK) >> 1U;
> +        rdbase = FIELD_EX64(cte, CTE, RDBASE);
>  
>          if (rdbase >= s->gicv3->num_cpu) {
>              return result;
> @@ -426,7 +426,8 @@ static bool update_cte(GICv3ITSState *s, uint16_t icid, bool valid,
>  
>      if (valid) {
>          /* add mapping entry to collection table */
> -        cte = (valid & TABLE_ENTRY_VALID_MASK) | (rdbase << 1ULL);
> +        cte = FIELD_DP64(cte, CTE, VALID, 1);
> +        cte = FIELD_DP64(cte, CTE, RDBASE, rdbase);

I almost flagged this until I realised the double deposit are additive
and the same as the bare |

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

-- 
Alex Bennée


  parent reply	other threads:[~2021-12-13 13:14 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-11 19:11 [PATCH 00/26] arm gicv3 ITS: Various bug fixes and refactorings Peter Maydell
2021-12-11 19:11 ` [PATCH 01/26] hw/intc: clean-up error reporting for failed ITS cmd Peter Maydell
2021-12-12 17:31   ` Richard Henderson
2021-12-11 19:11 ` [PATCH 02/26] hw/intc/arm_gicv3_its: Correct off-by-one bounds check on rdbase Peter Maydell
2021-12-12 17:32   ` Richard Henderson
2021-12-13 11:22   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 03/26] hw/intc/arm_gicv3_its: Remove redundant ITS_CTLR_ENABLED define Peter Maydell
2021-12-12 17:34   ` Richard Henderson
2021-12-12 20:46   ` Philippe Mathieu-Daudé
2021-12-13 11:55   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 04/26] hw/intc/arm_gicv3_its: Remove maxids union from TableDesc Peter Maydell
2021-12-12 17:37   ` Richard Henderson
2021-12-13 11:32   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 05/26] hw/intc/arm_gicv3_its: Don't return early in extract_table_params() loop Peter Maydell
2021-12-12 17:46   ` Richard Henderson
2021-12-13 11:33   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 06/26] hw/intc/arm_gicv3_its: Reduce code duplication in extract_table_params() Peter Maydell
2021-12-12 18:30   ` Richard Henderson
2021-12-12 20:47   ` Philippe Mathieu-Daudé
2021-12-13 11:34   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 07/26] hw/intc/arm_gicv3_its: Correct setting of TableDesc entry_sz Peter Maydell
2021-12-12 18:33   ` Richard Henderson
2021-12-13 11:37   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 08/26] hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL define Peter Maydell
2021-12-12 18:40   ` Richard Henderson
2021-12-13 11:52   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 09/26] hw/intc/arm_gicv3_its: Correct handling of MAPI Peter Maydell
2021-12-12 18:48   ` Richard Henderson
2021-12-13 11:54   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 10/26] hw/intc/arm_gicv3_its: Use FIELD macros for DTEs Peter Maydell
2021-12-12 20:23   ` Richard Henderson
2021-12-12 21:16   ` Philippe Mathieu-Daudé
2021-12-13  8:23     ` Philippe Mathieu-Daudé
2021-12-13 11:56   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 11/26] hw/intc/arm_gicv3_its: Use 1ULL when shifting by (DTE.SIZE + 1) Peter Maydell
2021-12-12 20:31   ` Richard Henderson
2021-12-12 20:43   ` Richard Henderson
2021-12-13  9:48     ` Peter Maydell
2021-12-13 10:56       ` Peter Maydell
2021-12-11 19:11 ` [PATCH 12/26] hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field size Peter Maydell
2021-12-12 20:34   ` Richard Henderson
2021-12-13 13:07   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 13/26] hw/intc/arm_gicv3_its: Use FIELD macros for CTEs Peter Maydell
2021-12-12 20:35   ` Richard Henderson
2021-12-13 13:08   ` Alex Bennée [this message]
2021-12-11 19:11 ` [PATCH 14/26] hw/intc/arm_gicv3_its: Fix various off-by-one errors Peter Maydell
2021-12-13 13:35   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 15/26] hw/intc/arm_gicv3_its: Rename max_l2_entries to num_l2_entries Peter Maydell
2021-12-12 20:38   ` Richard Henderson
2021-12-13 12:58   ` Philippe Mathieu-Daudé
2021-12-13 13:36   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 16/26] hw/intc/arm_gicv3_its: Fix event ID bounds checks Peter Maydell
2021-12-13 13:00   ` Philippe Mathieu-Daudé
2021-12-13 13:37   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 17/26] hw/intc/arm_gicv3_its: Convert int ID check to num_intids convention Peter Maydell
2021-12-13 13:39   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 18/26] hw/intc/arm_gicv3_its: Fix handling of process_its_cmd() return value Peter Maydell
2021-12-12 20:53   ` Richard Henderson
2021-12-13 13:01   ` Philippe Mathieu-Daudé
2021-12-13 13:41   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 19/26] hw/intc/arm_gicv3_its: Don't use data if reading command failed Peter Maydell
2021-12-12 20:54   ` Richard Henderson
2021-12-13 14:49   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 20/26] hw/intc/arm_gicv3_its: Use enum for return value of process_* functions Peter Maydell
2021-12-12 21:06   ` Richard Henderson
2021-12-13 13:03   ` Philippe Mathieu-Daudé
2021-12-13 14:40   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 21/26] hw/intc/arm_gicv3_its: Fix return codes in process_its_cmd() Peter Maydell
2021-12-12 22:02   ` Richard Henderson
2021-12-13 14:40   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 22/26] hw/intc/arm_gicv3_its: Refactor process_its_cmd() to reduce nesting Peter Maydell
2021-12-12 22:34   ` Richard Henderson
2021-12-13 14:50   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 23/26] hw/intc/arm_gicv3_its: Fix return codes in process_mapti() Peter Maydell
2021-12-12 22:36   ` Richard Henderson
2021-12-13 14:51   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 24/26] hw/intc/arm_gicv3_its: Fix return codes in process_mapc() Peter Maydell
2021-12-12 22:37   ` Richard Henderson
2021-12-13 14:51   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 25/26] hw/intc/arm_gicv3_its: Fix return codes in process_mapd() Peter Maydell
2021-12-12 22:39   ` Richard Henderson
2021-12-13 14:51   ` Alex Bennée
2021-12-11 19:11 ` [PATCH 26/26] hw/intc/arm_gicv3_its: Factor out "find address of table entry" code Peter Maydell
2021-12-12 22:52   ` Richard Henderson
2021-12-13 14:53   ` Alex Bennée
2021-12-13 15:48     ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87lf0olkge.fsf@linaro.org \
    --to=alex.bennee@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=shashi.mallela@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).