From: "Alex Bennée" <alex.bennee@linaro.org>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: peter.maydell@linaro.org, shashi.mallela@linaro.org,
qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org
Subject: Re: [PATCH v2] hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes
Date: Mon, 07 Jun 2021 11:23:31 +0100 [thread overview]
Message-ID: <87lf7mnfb7.fsf@linaro.org> (raw)
In-Reply-To: <20210604130352.1887560-1-jean-philippe@linaro.org>
Jean-Philippe Brucker <jean-philippe@linaro.org> writes:
> Commit 382c7160d1cd ("hw/intc/arm_gicv3_cpuif: Fix EOIR write access
> check logic") added an assert_not_reached() if the guest writes the EOIR
> register while no interrupt is active.
>
> It turns out some software does this: EDK2, in
> GicV3ExitBootServicesEvent(), unconditionally write EOIR for all
> interrupts that it manages. This now causes QEMU to abort when running
> UEFI on a VM with GICv3. Although it is UNPREDICTABLE behavior and EDK2
> does need fixing, the punishment seems a little harsh, especially since
> icc_eoir_write() already tolerates writes of nonexistent interrupt
> numbers. Display a guest error and tolerate spurious EOIR writes.
>
> Fixes: 382c7160d1cd ("hw/intc/arm_gicv3_cpuif: Fix EOIR write access check logic")
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Xen seems good at triggering this as well...
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
next prev parent reply other threads:[~2021-06-07 10:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-04 13:03 [PATCH v2] hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes Jean-Philippe Brucker
2021-06-04 13:09 ` Philippe Mathieu-Daudé
2021-06-07 10:23 ` Alex Bennée [this message]
2021-06-08 8:53 ` Peter Maydell
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