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From: Florian Weimer <fweimer@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Daniel P. Berrangé" <berrange@redhat.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH RFC 1/4] docs: add a table showing x86-64 ABI compatibility levels
Date: Tue, 02 Feb 2021 10:06:59 +0100	[thread overview]
Message-ID: <87lfc6zvm4.fsf@oldenburg.str.redhat.com> (raw)
In-Reply-To: <CAFEAcA-yzX1ZSPayvy9u8GUbXpgLgQNA7=52qSnDMjakSU0B-Q@mail.gmail.com> (Peter Maydell's message of "Mon, 1 Feb 2021 16:53:03 +0000")

* Peter Maydell:

> Apart from the QEMU/KVM specific CPU models, why is this something
> we should be documenting rather than, say, the people specifying
> what the ABI compatiblity levels are ?

The psABI only cares about userspace, and the specification there
deliberately excludes CPU features used in cryptography blocks, and
features that seem unstable and likely to be disabled in firmware or
future microcode updates.  This seemed a good trade-off for the psABI
because in userspace, run-time detection is still available, to access
additional CPU features not available as part of the target x86-64 level
at build time.

This doesn't really work for virtualization, which also has to decide
what to do with CPU features not relevant to userspace.  And a decision
to exclude features is final in the sense that guests cannot use the
feature at all because run-time detection shows it is as unavailable.

This is why a 1:1 copy of the userspace levels to virtualized machine
models is not possible, I think.

Thanks,
Florian
-- 
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Commercial register: Amtsgericht Muenchen, HRB 153243,
Managing Directors: Charles Cachera, Brian Klemm, Laurie Krebs, Michael O'Neill



  parent reply	other threads:[~2021-02-02  9:09 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-01 15:36 [PATCH RFC 0/4] target/i386/cpu: introduce new CPU models for x86-64 ABI levels Daniel P. Berrangé
2021-02-01 15:36 ` [PATCH RFC 1/4] docs: add a table showing x86-64 ABI compatibility levels Daniel P. Berrangé
2021-02-01 16:33   ` Florian Weimer
2021-02-01 17:17     ` Daniel P. Berrangé
2021-02-01 16:53   ` Peter Maydell
2021-02-01 17:19     ` Daniel P. Berrangé
2021-02-02  9:06     ` Florian Weimer [this message]
2021-02-01 18:28   ` Eduardo Habkost
2021-02-02 12:24     ` Daniel P. Berrangé
2021-02-02  9:41   ` David Edmondson
2021-02-02 12:23     ` Daniel P. Berrangé
2021-02-02 12:43       ` David Edmondson
2021-02-01 15:36 ` [PATCH RFC 2/4] target/i386: define CPU models to model x86-64 ABI levels Daniel P. Berrangé
2021-02-02  9:46   ` David Edmondson
2021-02-02 12:32     ` Daniel P. Berrangé
2021-02-02 12:50       ` David Edmondson
2021-02-02 12:54         ` Daniel P. Berrangé
2021-02-01 15:36 ` [PATCH RFC 3/4] NOT FOR MERGE target/i386: use x86-64-abi1 CPU model as default on x86_64 Daniel P. Berrangé
2021-02-01 15:36 ` [PATCH RFC 4/4] NOT FOR MERGE: script for CPU model stuff related to x86-64 ABI levels Daniel P. Berrangé

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