From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5752EC10F25 for ; Mon, 9 Mar 2020 06:26:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C01220665 for ; Mon, 9 Mar 2020 06:26:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2C01220665 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:37048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBBs2-0006xS-BX for qemu-devel@archiver.kernel.org; Mon, 09 Mar 2020 02:26:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57599) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBBrR-0006Uq-IE for qemu-devel@nongnu.org; Mon, 09 Mar 2020 02:25:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jBBrQ-0004TM-0H for qemu-devel@nongnu.org; Mon, 09 Mar 2020 02:25:57 -0400 Received: from mail01.asahi-net.or.jp ([202.224.55.13]:34851) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1jBBrP-0004RA-Ns for qemu-devel@nongnu.org; Mon, 09 Mar 2020 02:25:55 -0400 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) (Authenticated sender: PQ4Y-STU) by mail01.asahi-net.or.jp (Postfix) with ESMTPA id BF55956FC0; Mon, 9 Mar 2020 15:25:47 +0900 (JST) Received: from yo-satoh-debian.ysato.ml (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 32B791C07F7; Mon, 9 Mar 2020 15:25:47 +0900 (JST) Date: Mon, 09 Mar 2020 15:25:46 +0900 Message-ID: <87lfoa9h91.wl-ysato@users.sourceforge.jp> From: Yoshinori Sato To: Philippe =?ISO-8859-1?Q?Mathieu-Daud=E9?= Subject: Re: [PATCH v32 16/22] hw/char: RX62N serial communication interface (SCI) In-Reply-To: <9a20c7bc-6d32-7384-c8a6-7ff8c852e08b@redhat.com> References: <20200224141923.82118-1-ysato@users.sourceforge.jp> <20200224141923.82118-17-ysato@users.sourceforge.jp> <9a20c7bc-6d32-7384-c8a6-7ff8c852e08b@redhat.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 202.224.55.13 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, Alex =?ISO-8859-1?Q?Benn=E9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 09 Mar 2020 00:41:45 +0900, Philippe Mathieu-Daud=E9 wrote: >=20 > Hi Yoshinori, >=20 > On 2/24/20 3:19 PM, Yoshinori Sato wrote: > > This module supported only non FIFO type. > > Hardware manual. > > https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh00= 33ej0140_rx62n.pdf > >=20 > > Signed-off-by: Yoshinori Sato > > Reviewed-by: Alex Benn=E9e > > Reviewed-by: Philippe Mathieu-Daud=E9 > > Message-Id: <20190607091116.49044-8-ysato@users.sourceforge.jp> > > Tested-by: Philippe Mathieu-Daud=E9 > > Signed-off-by: Richard Henderson > > --- > > include/hw/char/renesas_sci.h | 45 +++++ > > hw/char/renesas_sci.c | 342 ++++++++++++++++++++++++++++++++++ > > hw/char/Kconfig | 3 + > > hw/char/Makefile.objs | 1 + > > 4 files changed, 391 insertions(+) > > create mode 100644 include/hw/char/renesas_sci.h > > create mode 100644 hw/char/renesas_sci.c > >=20 > > diff --git a/include/hw/char/renesas_sci.h b/include/hw/char/renesas_sc= i.h > > new file mode 100644 > > index 0000000000..50d1336944 > > --- /dev/null > > +++ b/include/hw/char/renesas_sci.h > > @@ -0,0 +1,45 @@ > > +/* > > + * Renesas Serial Communication Interface > > + * > > + * Copyright (c) 2018 Yoshinori Sato > > + * > > + * This code is licensed under the GPL version 2 or later. > > + * > > + */ > > + > > +#include "chardev/char-fe.h" > > +#include "qemu/timer.h" > > +#include "hw/sysbus.h" > > + > > +#define TYPE_RENESAS_SCI "renesas-sci" > > +#define RSCI(obj) OBJECT_CHECK(RSCIState, (obj), TYPE_RENESAS_SCI) > > + > > +enum { > > + ERI =3D 0, > > + RXI =3D 1, > > + TXI =3D 2, > > + TEI =3D 3, > > + SCI_NR_IRQ =3D 4, > > +}; > > + > > +typedef struct { > > + SysBusDevice parent_obj; > > + MemoryRegion memory; > > + > > + uint8_t smr; > > + uint8_t brr; > > + uint8_t scr; > > + uint8_t tdr; > > + uint8_t ssr; > > + uint8_t rdr; > > + uint8_t scmr; > > + uint8_t semr; > > + > > + uint8_t read_ssr; > > + int64_t trtime; > > + int64_t rx_next; > > + QEMUTimer *timer; > > + CharBackend chr; > > + uint64_t input_freq; > > + qemu_irq irq[SCI_NR_IRQ]; > > +} RSCIState; > > diff --git a/hw/char/renesas_sci.c b/hw/char/renesas_sci.c > > new file mode 100644 > > index 0000000000..0760a51f43 > > --- /dev/null > > +++ b/hw/char/renesas_sci.c > > @@ -0,0 +1,342 @@ > > +/* > > + * Renesas Serial Communication Interface >=20 > Looking at this again, have you looked at the SH model > (hw/char/sh_serial.c)? This seems the same. > (Similarly your timer model with hw/timer/sh_timer.c). > sh_serial has FIFO. renesas_sci has no FIFO. These are relationships like 8250 and 16550. sh_serial is old,so I think it's better to implement and integrate FIFO into renesas_sci. > > + * > > + * Datasheet: RX62N Group, RX621 Group User's Manual: Hardware > > + * (Rev.1.40 R01UH0033EJ0140) > > + * > > + * Copyright (c) 2019 Yoshinori Sato > > + * > > + * This program is free software; you can redistribute it and/or modif= y it > > + * under the terms and conditions of the GNU General Public License, > > + * version 2 or later, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but WITH= OUT > > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY = or > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public Licen= se for > > + * more details. > > + * > > + * You should have received a copy of the GNU General Public License a= long with > > + * this program. If not, see . > > + */ > > + > > +#include "qemu/osdep.h" > > +#include "qemu/log.h" > > +#include "qapi/error.h" > > +#include "qemu-common.h" > > +#include "hw/hw.h" > > +#include "hw/irq.h" > > +#include "hw/sysbus.h" > > +#include "hw/registerfields.h" > > +#include "hw/qdev-properties.h" > > +#include "hw/char/renesas_sci.h" > > +#include "migration/vmstate.h" > > +#include "qemu/error-report.h" > > + > > +/* SCI register map */ > > +REG8(SMR, 0) > > + FIELD(SMR, CKS, 0, 2) > > + FIELD(SMR, MP, 2, 1) > > + FIELD(SMR, STOP, 3, 1) > > + FIELD(SMR, PM, 4, 1) > > + FIELD(SMR, PE, 5, 1) > > + FIELD(SMR, CHR, 6, 1) > > + FIELD(SMR, CM, 7, 1) > > +REG8(BRR, 1) > > +REG8(SCR, 2) > > + FIELD(SCR, CKE, 0, 2) > > + FIELD(SCR, TEIE, 2, 1) > > + FIELD(SCR, MPIE, 3, 1) > > + FIELD(SCR, RE, 4, 1) > > + FIELD(SCR, TE, 5, 1) > > + FIELD(SCR, RIE, 6, 1) > > + FIELD(SCR, TIE, 7, 1) > > +REG8(TDR, 3) > > +REG8(SSR, 4) > > + FIELD(SSR, MPBT, 0, 1) > > + FIELD(SSR, MPB, 1, 1) > > + FIELD(SSR, TEND, 2, 1) > > + FIELD(SSR, ERR, 3, 3) > > + FIELD(SSR, PER, 3, 1) > > + FIELD(SSR, FER, 4, 1) > > + FIELD(SSR, ORER, 5, 1) > > + FIELD(SSR, RDRF, 6, 1) > > + FIELD(SSR, TDRE, 7, 1) > > +REG8(RDR, 5) > > +REG8(SCMR, 6) > > + FIELD(SCMR, SMIF, 0, 1) > > + FIELD(SCMR, SINV, 2, 1) > > + FIELD(SCMR, SDIR, 3, 1) > > + FIELD(SCMR, BCP2, 7, 1) > > +REG8(SEMR, 7) > > + FIELD(SEMR, ACS0, 0, 1) > > + FIELD(SEMR, ABCS, 4, 1) > > + > > +static int can_receive(void *opaque) > > +{ > > + RSCIState *sci =3D RSCI(opaque); > > + if (sci->rx_next > qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)) { > > + return 0; > > + } else { > > + return FIELD_EX8(sci->scr, SCR, RE); > > + } > > +} > > + > > +static void receive(void *opaque, const uint8_t *buf, int size) > > +{ > > + RSCIState *sci =3D RSCI(opaque); > > + sci->rx_next =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + sci->trti= me; > > + if (FIELD_EX8(sci->ssr, SSR, RDRF) || size > 1) { > > + sci->ssr =3D FIELD_DP8(sci->ssr, SSR, ORER, 1); > > + if (FIELD_EX8(sci->scr, SCR, RIE)) { > > + qemu_set_irq(sci->irq[ERI], 1); > > + } > > + } else { > > + sci->rdr =3D buf[0]; > > + sci->ssr =3D FIELD_DP8(sci->ssr, SSR, RDRF, 1); > > + if (FIELD_EX8(sci->scr, SCR, RIE)) { > > + qemu_irq_pulse(sci->irq[RXI]); > > + } > > + } > > +} > [...] >=20 >=20 --=20 Yosinori Sato