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Thu, 13 Mar 2025 09:22:11 -0700 (PDT) Received: from draig.lan ([185.126.160.109]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-395cb318a8bsm2649416f8f.66.2025.03.13.09.22.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Mar 2025 09:22:11 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 499115F8C7; Thu, 13 Mar 2025 16:22:10 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Richard Henderson Cc: qemu-devel@nongnu.org, pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: Re: [PATCH 06/37] include/exec: Inline *_data_ra memory operations In-Reply-To: <20250313034524.3069690-7-richard.henderson@linaro.org> (Richard Henderson's message of "Wed, 12 Mar 2025 20:44:46 -0700") References: <20250313034524.3069690-1-richard.henderson@linaro.org> <20250313034524.3069690-7-richard.henderson@linaro.org> User-Agent: mu4e 1.12.9; emacs 30.1 Date: Thu, 13 Mar 2025 16:22:10 +0000 Message-ID: <87msdo52a5.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Richard Henderson writes: > These expand inline to the *_mmuidx_ra api with > a lookup of the target's cpu_mmu_index(). > > Signed-off-by: Richard Henderson This is where my re-based bisect broke. Fixed by moving cpu.h modified target/ppc/tcg-excp_helper.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "qemu/log.h" +#include "cpu.h" #include "exec/cpu_ldst.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" @@ -27,7 +28,6 @@ #include "helper_regs.h" #include "hw/ppc/ppc.h" #include "internal.h" -#include "cpu.h" #include "trace.h" > --- > include/exec/cpu_ldst.h | 144 +++++++++++++++++++++++++++++------- > accel/tcg/ldst_common.c.inc | 108 --------------------------- > 2 files changed, 118 insertions(+), 134 deletions(-) > > diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h > index b33755169e..963c538176 100644 > --- a/include/exec/cpu_ldst.h > +++ b/include/exec/cpu_ldst.h > @@ -84,17 +84,6 @@ int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr); > uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr); > uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr); >=20=20 > -uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); > -int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); > -uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t r= a); > -int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); > -uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra= ); > -uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra= ); > -uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t r= a); > -int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); > -uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra= ); > -uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra= ); > - > void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val); > void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); > void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); > @@ -103,21 +92,6 @@ void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, = uint32_t val); > void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val); > void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val); >=20=20 > -void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, > - uint32_t val, uintptr_t ra); > -void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr ptr, > - uint32_t val, uintptr_t ra); > -void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr ptr, > - uint32_t val, uintptr_t ra); > -void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr ptr, > - uint64_t val, uintptr_t ra); > -void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr ptr, > - uint32_t val, uintptr_t ra); > -void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr ptr, > - uint32_t val, uintptr_t ra); > -void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr ptr, > - uint64_t val, uintptr_t ra); > - > static inline uint32_t > cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr= _t ra) > { > @@ -249,6 +223,124 @@ cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr add= r, uint64_t val, > cpu_stq_mmu(env, addr, val, oi, ra); > } >=20=20 > +/*--------------------------*/ > + > +static inline uint32_t > +cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_ldub_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline int > +cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + return (int8_t)cpu_ldub_data_ra(env, addr, ra); > +} > + > +static inline uint32_t > +cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_lduw_be_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline int > +cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + return (int16_t)cpu_lduw_be_data_ra(env, addr, ra); > +} > + > +static inline uint32_t > +cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_ldl_be_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline uint64_t > +cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_ldq_be_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline uint32_t > +cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_lduw_le_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline int > +cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + return (int16_t)cpu_lduw_le_data_ra(env, addr, ra); > +} > + > +static inline uint32_t > +cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_ldl_le_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline uint64_t > +cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + return cpu_ldq_le_mmuidx_ra(env, addr, mmu_index, ra); > +} > + > +static inline void > +cpu_stb_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t= ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stb_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > +static inline void > +cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintpt= r_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stw_be_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > +static inline void > +cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintpt= r_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stl_be_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > +static inline void > +cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintpt= r_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stq_be_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > +static inline void > +cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintpt= r_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stw_le_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > +static inline void > +cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintpt= r_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stl_le_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > +static inline void > +cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintpt= r_t ra) > +{ > + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > + cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra); > +} > + > #if TARGET_BIG_ENDIAN > # define cpu_lduw_data cpu_lduw_be_data > # define cpu_ldsw_data cpu_ldsw_be_data > diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc > index 99a56df3fb..2f203290db 100644 > --- a/accel/tcg/ldst_common.c.inc > +++ b/accel/tcg/ldst_common.c.inc > @@ -248,114 +248,6 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, In= t128 val, > * Wrappers of the above > */ >=20=20 > -uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_ldub_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > -{ > - return (int8_t)cpu_ldub_data_ra(env, addr, ra); > -} > - > -uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t = ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_lduw_be_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > -{ > - return (int16_t)cpu_lduw_be_data_ra(env, addr, ra); > -} > - > -uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t r= a) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_ldl_be_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t r= a) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_ldq_be_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t = ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_lduw_le_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) > -{ > - return (int16_t)cpu_lduw_le_data_ra(env, addr, ra); > -} > - > -uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t r= a) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_ldl_le_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t r= a) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - return cpu_ldq_le_mmuidx_ra(env, addr, mmu_index, ra); > -} > - > -void cpu_stb_data_ra(CPUArchState *env, abi_ptr addr, > - uint32_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stb_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr, > - uint32_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stw_be_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr, > - uint32_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stl_be_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr, > - uint64_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stq_be_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr, > - uint32_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stw_le_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr, > - uint32_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stl_le_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, > - uint64_t val, uintptr_t ra) > -{ > - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); > - cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra); > -} > - > -/*--------------------------*/ > - > uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr) > { > return cpu_ldub_data_ra(env, addr, 0); --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro