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X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair.francis@wdc.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > There are no users of this function outside cputlb.c, > and its interface will change in the next patch. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e > --- > include/exec/cpu_ldst.h | 5 ----- > accel/tcg/cputlb.c | 5 +++++ > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h > index a46116167c..53de19753a 100644 > --- a/include/exec/cpu_ldst.h > +++ b/include/exec/cpu_ldst.h > @@ -234,11 +234,6 @@ static inline uintptr_t tlb_index(CPUArchState *env,= uintptr_t mmu_idx, > return (addr >> TARGET_PAGE_BITS) & size_mask; > } >=20=20 > -static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) > -{ > - return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1; > -} > - > /* Find the TLB entry corresponding to the mmu_idx + address pair. */ > static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_id= x, > target_ulong addr) > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c > index 1a81886e58..e4a8ed9534 100644 > --- a/accel/tcg/cputlb.c > +++ b/accel/tcg/cputlb.c > @@ -80,6 +80,11 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on= _cpu_data)); > QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16); > #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1) >=20=20 > +static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) > +{ > + return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1; > +} > + > static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx) > { > return env_tlb(env)->f[mmu_idx].mask + (1 << CPU_TLB_ENTRY_BITS); --=20 Alex Benn=C3=A9e