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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, cota@braap.org
Subject: Re: [Qemu-devel] [PATCH v5 14/19] target/alpha: Use tcg_gen_goto_ptr
Date: Fri, 28 Apr 2017 18:10:30 +0100	[thread overview]
Message-ID: <87mvb07915.fsf@linaro.org> (raw)
In-Reply-To: <20170427120006.20564-15-rth@twiddle.net>


Richard Henderson <rth@twiddle.net> writes:

> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target/alpha/translate.c | 49 +++++++++++++++++++++++++++++++++++-------------
>  1 file changed, 36 insertions(+), 13 deletions(-)
>
> diff --git a/target/alpha/translate.c b/target/alpha/translate.c
> index df5d695..c1a5fbf 100644
> --- a/target/alpha/translate.c
> +++ b/target/alpha/translate.c
> @@ -89,6 +89,10 @@ typedef enum {
>         updated the PC for the next instruction to be executed.  */
>      EXIT_PC_STALE,
>
> +    /* Similarly, but force TB exit without chaining.  */
> +    EXIT_PC_UPDATED_FORCE,
> +    EXIT_PC_STALE_FORCE,
> +
>      /* We are ending the TB with a noreturn function call, e.g. longjmp.
>         No following code will be executed.  */
>      EXIT_NORETURN,
> @@ -455,11 +459,16 @@ static bool in_superpage(DisasContext *ctx, int64_t addr)
>  #endif
>  }
>
> +static bool use_exit_tb(DisasContext *ctx)
> +{
> +    /* Suppress any optimization in the case of single-steping and IO.  */
> +    return ((ctx->tb->cflags & CF_LAST_IO)
> +            || ctx->singlestep_enabled || singlestep);
> +}
> +
>  static bool use_goto_tb(DisasContext *ctx, uint64_t dest)
>  {
> -    /* Suppress goto_tb in the case of single-steping and IO.  */
> -    if ((ctx->tb->cflags & CF_LAST_IO)
> -        || ctx->singlestep_enabled || singlestep) {
> +    if (use_exit_tb(ctx)) {
>          return false;
>      }
>  #ifndef CONFIG_USER_ONLY
> @@ -1257,14 +1266,14 @@ static ExitStatus gen_call_pal(DisasContext *ctx, int palcode)
>             need the page permissions check.  We'll see the existence of
>             the page when we create the TB, and we'll flush all TBs if
>             we change the PAL base register.  */
> -        if (!ctx->singlestep_enabled && !(ctx->tb->cflags & CF_LAST_IO)) {
> +        if (use_exit_tb(ctx)) {
> +            tcg_gen_movi_i64(cpu_pc, entry);
> +            return EXIT_PC_UPDATED;
> +        } else {
>              tcg_gen_goto_tb(0);
>              tcg_gen_movi_i64(cpu_pc, entry);
>              tcg_gen_exit_tb((uintptr_t)ctx->tb);
>              return EXIT_GOTO_TB;
> -        } else {
> -            tcg_gen_movi_i64(cpu_pc, entry);
> -            return EXIT_PC_UPDATED;
>          }
>      }
>  #endif
> @@ -1323,7 +1332,7 @@ static ExitStatus gen_mfpr(DisasContext *ctx, TCGv va, int regno)
>              gen_io_start();
>              helper(va);
>              gen_io_end();
> -            return EXIT_PC_STALE;
> +            return EXIT_PC_STALE_FORCE;
>          } else {
>              helper(va);
>          }
> @@ -1374,7 +1383,7 @@ static ExitStatus gen_mtpr(DisasContext *ctx, TCGv vb, int regno)
>      case 252:
>          /* HALT */
>          gen_helper_halt(vb);
> -        return EXIT_PC_STALE;
> +        return EXIT_PC_STALE_FORCE;
>
>      case 251:
>          /* ALARM */
> @@ -1388,7 +1397,7 @@ static ExitStatus gen_mtpr(DisasContext *ctx, TCGv vb, int regno)
>             that ended with a CALL_PAL.  Since the base register usually only
>             changes during boot, flushing everything works well.  */
>          gen_helper_tb_flush(cpu_env);
> -        return EXIT_PC_STALE;
> +        return EXIT_PC_STALE_FORCE;
>
>      case 32 ... 39:
>          /* Accessing the "non-shadow" general registers.  */
> @@ -2373,7 +2382,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
>                  gen_io_start();
>                  gen_helper_load_pcc(va, cpu_env);
>                  gen_io_end();
> -                ret = EXIT_PC_STALE;
> +                ret = EXIT_PC_STALE_FORCE;
>              } else {
>                  gen_helper_load_pcc(va, cpu_env);
>              }
> @@ -2990,18 +2999,32 @@ void gen_intermediate_code(CPUAlphaState *env, struct TranslationBlock *tb)
>      case EXIT_GOTO_TB:
>      case EXIT_NORETURN:
>          break;
> +
>      case EXIT_PC_STALE:
>          tcg_gen_movi_i64(cpu_pc, ctx.pc);
> -        /* FALLTHRU */
> +        goto do_exit_pc_updated;
> +    case EXIT_PC_STALE_FORCE:
> +        tcg_gen_movi_i64(cpu_pc, ctx.pc);
> +        goto do_exit_pc_updated_force;
> +
>      case EXIT_PC_UPDATED:
> +    do_exit_pc_updated:
> +        if (!use_exit_tb(&ctx)) {
> +            tcg_gen_lookup_and_goto_ptr(cpu_pc);
> +            break;
> +        }
> +        /* FALLTHRU */
> +    case EXIT_PC_UPDATED_FORCE:
> +    do_exit_pc_updated_force:
>          if (ctx.singlestep_enabled) {
>              gen_excp_1(EXCP_DEBUG, 0);
>          } else {
>              tcg_gen_exit_tb(0);
>          }
>          break;

Hmm this is ugly. You can make it a bit cleaner I think:

    case EXIT_PC_STALE:
        tcg_gen_movi_i64(cpu_pc, ctx.pc);
        /* FALLTHRU */
    case EXIT_PC_UPDATED:
        if (!use_exit_tb(&ctx)) {
            tcg_gen_lookup_and_goto_ptr(cpu_pc);
            break;
        }
        goto do_exit_pc_updated_force;

    case EXIT_PC_STALE_FORCE:
        tcg_gen_movi_i64(cpu_pc, ctx.pc);
        /* FALLTHRU */

    case EXIT_PC_UPDATED_FORCE:
    do_exit_pc_updated_force:
        if (ctx.singlestep_enabled) {
            gen_excp_1(EXCP_DEBUG, 0);
        } else {
            tcg_gen_exit_tb(0);
        }
        break;

But personally I'd be tempted to inline the force function and have:

static inline gen_exit_or_excp(void)
{
    if (ctx.singlestep_enabled) {
        gen_excp_1(EXCP_DEBUG, 0);
    } else {
        tcg_gen_exit_tb(0);
    }
}

and:

    case EXIT_PC_STALE:
        tcg_gen_movi_i64(cpu_pc, ctx.pc);
        /* FALLTHRU */
    case EXIT_PC_UPDATED:
        if (!use_exit_tb(&ctx)) {
            tcg_gen_lookup_and_goto_ptr(cpu_pc);
            break;
        }
        gen_exit_or_excp();
        break;

    case EXIT_PC_STALE_FORCE:
        tcg_gen_movi_i64(cpu_pc, ctx.pc);
        /* FALLTHRU */

    case EXIT_PC_UPDATED_FORCE:
        gen_exit_or_excp();
        break;

    default:
        g_assert_not_reached();
    }



> +
>      default:
> -        abort();
> +        g_assert_not_reached();
>      }
>
>      gen_tb_end(tb, num_insns);


--
Alex Bennée

  reply	other threads:[~2017-04-28 17:10 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-27 11:59 [Qemu-devel] [PATCH v5 00/19] TCG cross-tb optimizations Richard Henderson
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 01/19] target/nios2: Fix 64-bit ilp32 compilation Richard Henderson
2017-04-27 16:03   ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 02/19] tcg/sparc: Use the proper compilation flags for 32-bit Richard Henderson
2017-04-27 16:04   ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 03/19] qemu/atomic: Loosen restrictions for 64-bit ILP32 hosts Richard Henderson
2017-04-27 16:10   ` Alex Bennée
2017-04-28  7:07     ` Richard Henderson
2017-04-28  7:47       ` Alex Bennée
2017-04-28  8:05         ` Richard Henderson
2017-04-28 10:25           ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 04/19] exec-all: export tb_htable_lookup Richard Henderson
2017-04-27 16:10   ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 05/19] tcg-runtime: add lookup_tb_ptr helper Richard Henderson
2017-04-28 10:29   ` Alex Bennée
2017-04-28 10:32     ` Richard Henderson
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 06/19] tcg: introduce goto_ptr opcode Richard Henderson
2017-04-28 10:32   ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 07/19] tcg: export tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 08/19] target/arm: optimize cross-page direct jumps in softmmu Richard Henderson
2017-04-28 11:30   ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 09/19] target/arm: optimize indirect branches Richard Henderson
2017-04-27 22:58   ` Emilio G. Cota
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 10/19] target/i386: introduce gen_jr helper to generate lookup_and_goto_ptr Richard Henderson
2017-04-28 16:50   ` Alex Bennée
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 11/19] target/i386: optimize cross-page direct jumps in softmmu Richard Henderson
2017-04-28 16:56   ` Alex Bennée
2017-04-29  9:14     ` Richard Henderson
2017-04-27 11:59 ` [Qemu-devel] [PATCH v5 12/19] target/i386: optimize indirect branches Richard Henderson
2017-04-28 16:58   ` Alex Bennée
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 13/19] tb-hash: improve tb_jmp_cache hash function in user mode Richard Henderson
2017-04-28 17:00   ` Alex Bennée
2017-04-28 17:44     ` Emilio G. Cota
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 14/19] target/alpha: Use tcg_gen_goto_ptr Richard Henderson
2017-04-28 17:10   ` Alex Bennée [this message]
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 15/19] tcg/i386: implement goto_ptr Richard Henderson
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 16/19] tcg/ppc: Implement goto_ptr Richard Henderson
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 17/19] tcg/aarch64: " Richard Henderson
2017-04-27 22:18   ` Emilio G. Cota
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 18/19] tcg/sparc: " Richard Henderson
2017-04-27 12:00 ` [Qemu-devel] [PATCH v5 19/19] tcg/s390: " Richard Henderson
2017-04-27 12:58 ` [Qemu-devel] [PATCH v5 00/19] TCG cross-tb optimizations no-reply
2017-04-28 19:17 ` [Qemu-devel] [PATCH v5+] " Emilio G. Cota
2017-04-28 19:17   ` [Qemu-devel] [PATCH v5 + 1/2] target/aarch64: optimize cross-page direct jumps in softmmu Emilio G. Cota
2017-04-28 19:22     ` Emilio G. Cota
2017-04-29 10:30       ` Richard Henderson
2017-05-01  2:10         ` Emilio G. Cota
2017-04-28 19:17   ` [Qemu-devel] [PATCH v5 + 2/2] target/aarch64: optimize indirect branches Emilio G. Cota
2017-04-28 21:19     ` Emilio G. Cota
2017-04-30  9:47     ` Richard Henderson
2017-04-30 10:17       ` Richard Henderson
2017-04-30 14:52 ` [Qemu-devel] [PATCH v5++] TCG cross-tb optimizations Aurelien Jarno
2017-04-30 14:52   ` [Qemu-devel] [PATCH v5++ 1/3] tcg/mips: implement goto_ptr Aurelien Jarno
2017-05-01 22:00     ` Philippe Mathieu-Daudé
2017-05-02 16:21     ` Richard Henderson
2017-05-02 19:38       ` Aurelien Jarno
2017-04-30 14:52   ` [Qemu-devel] [PATCH v5++ 2/3] target/mips: optimize cross-page direct jumps in softmmu Aurelien Jarno
2017-04-30 14:52   ` [Qemu-devel] [PATCH v5++ 3/3] target/mips: optimize indirect branches Aurelien Jarno

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