From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45480) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W6Fd5-0001T7-Mw for qemu-devel@nongnu.org; Thu, 23 Jan 2014 03:27:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W6Fcq-0008RW-ND for qemu-devel@nongnu.org; Thu, 23 Jan 2014 03:27:15 -0500 Received: from e28smtp07.in.ibm.com ([122.248.162.7]:46537) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W6Fcq-0008Pn-1L for qemu-devel@nongnu.org; Thu, 23 Jan 2014 03:27:00 -0500 Received: from /spool/local by e28smtp07.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 23 Jan 2014 13:56:54 +0530 From: "Aneesh Kumar K.V" In-Reply-To: <1390369426-6462-4-git-send-email-aik@ozlabs.ru> References: <1390369426-6462-1-git-send-email-aik@ozlabs.ru> <1390369426-6462-4-git-send-email-aik@ozlabs.ru> Date: Thu, 23 Jan 2014 13:56:50 +0530 Message-ID: <87ob33hzn9.fsf@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Qemu-devel] [PATCH v3 3/3] spapr-hcall: add address-translation-mode-on-interrupt resource in H_SET_MODE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org Alexey Kardashevskiy writes: > This adds handling of the RESOURCE_ADDR_TRANS_MODE resource from > the H_SET_MODE, for POWER8 (PowerISA 2.07) only. > > Signed-off-by: Alexey Kardashevskiy > --- > hw/ppc/spapr_hcall.c | 26 ++++++++++++++++++++++++++ > target-ppc/cpu.h | 2 ++ > 2 files changed, 28 insertions(+) > > diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c > index b21d74b..7e4fc5f 100644 > --- a/hw/ppc/spapr_hcall.c > +++ b/hw/ppc/spapr_hcall.c > @@ -721,6 +721,32 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr, > default: > ret = H_UNSUPPORTED_FLAG; > } > + } else if (resource == H_SET_MODE_RESOURCE_ADDR_TRANS_MODE) { > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > + > + if (!(pcc->insns_flags2 & PPC2_ISA207S)) { > + return H_P2; > + } > + if (value1) { > + ret = H_P3; > + goto out; > + } > + if (value2) { > + ret = H_P4; > + goto out; > + } > + switch (mflags) { > + case 0: Shouldn't case 0 clear the LPCR_AIL bit ? > + case 2: > + case 3: > + CPU_FOREACH(cs) { > + set_spr(cs, SPR_LPCR, mflags << LPCR_AIL_SH, LPCR_AIL); > + } > + return H_SUCCESS; > + > + default: > + return H_UNSUPPORTED_FLAG; > + } > } > -aneesh