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Mon, 03 Feb 2025 06:14:27 -0800 (PST) Received: from draig.lan ([185.126.160.109]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5dc72404537sm7830490a12.35.2025.02.03.06.14.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 06:14:25 -0800 (PST) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 5487F5F8BF; Mon, 3 Feb 2025 14:14:25 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Julia Cc: "Daniel Henrique Barboza" , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: Re: [PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs In-Reply-To: <8149beba-66b1-4707-93f1-083b8bc5ece0@app.fastmail.com> (Julia's message of "Mon, 03 Feb 2025 18:12:21 +1100") References: <20250202051505.1846933-1-midnight@trainwit.ch> <20250202051505.1846933-2-midnight@trainwit.ch> <8149beba-66b1-4707-93f1-083b8bc5ece0@app.fastmail.com> User-Agent: mu4e 1.12.8; emacs 29.4 Date: Mon, 03 Feb 2025 14:14:25 +0000 Message-ID: <87pljzazem.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Julia writes: >> This happens because 'pte' is a 'target_ulong' type that, for riscv32, w= ill be >> interpreted as uint32_t while the FMT being used is PRIx64. >> >> You can fix it by using TARGET_FMT_lx instead of PRIx64: >> > > I've sent a follow-up patch fixing these build errors, it builds on 32 & = 64 bit on my system. Cheers=20 > > As for the Signed-off-by, I'd rather not, and the contributing guide > does not require it. It absolutely does, as listed in the minimal checklist: https://qemu.readthedocs.io/en/master/devel/submitting-a-patch.html#id30 > > Regards, > Julia --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro