From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v5 01/17] accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
Date: Thu, 29 Sep 2022 12:45:54 +0100 [thread overview]
Message-ID: <87pmfe1k07.fsf@linaro.org> (raw)
In-Reply-To: <20220925105124.82033-2-richard.henderson@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> This structure will shortly contain more than just
> data for accessing MMIO. Rename the 'addr' member
> to 'xlat_section' to more clearly indicate its purpose.
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
next prev parent reply other threads:[~2022-09-29 13:25 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-25 10:51 [PATCH v5 00/17] tcg: CPUTLBEntryFull and TARGET_TB_PCREL Richard Henderson
2022-09-25 10:51 ` [PATCH v5 01/17] accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull Richard Henderson
2022-09-29 11:45 ` Alex Bennée [this message]
2022-09-25 10:51 ` [PATCH v5 02/17] accel/tcg: Drop addr member from SavedIOTLB Richard Henderson
2022-09-29 11:46 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 03/17] accel/tcg: Suppress auto-invalidate in probe_access_internal Richard Henderson
2022-09-29 11:49 ` Alex Bennée
2022-09-29 11:50 ` David Hildenbrand
2022-09-25 10:51 ` [PATCH v5 04/17] accel/tcg: Introduce probe_access_full Richard Henderson
2022-09-29 11:51 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 05/17] accel/tcg: Introduce tlb_set_page_full Richard Henderson
2022-09-29 12:00 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 06/17] include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA Richard Henderson
2022-09-29 12:00 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 07/17] target/sparc: Use tlb_set_page_full Richard Henderson
2022-09-25 10:51 ` [PATCH v5 08/17] accel/tcg: Move byte_swap from MemTxAttrs to CPUTLBEntryFull Richard Henderson
2022-09-29 12:27 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 09/17] accel/tcg: Add force_aligned " Richard Henderson
2022-09-25 10:51 ` [PATCH v5 10/17] accel/tcg: Remove PageDesc code_bitmap Richard Henderson
2022-09-29 12:27 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 11/17] accel/tcg: Use bool for page_find_alloc Richard Henderson
2022-09-25 10:51 ` [PATCH v5 12/17] accel/tcg: Use DisasContextBase in plugin_gen_tb_start Richard Henderson
2022-09-25 10:51 ` [PATCH v5 13/17] accel/tcg: Do not align tb->page_addr[0] Richard Henderson
2022-09-25 10:51 ` [PATCH v5 14/17] include/hw/core: Create struct CPUJumpCache Richard Henderson
2022-09-29 13:46 ` Alex Bennée
2022-09-29 16:22 ` Richard Henderson
2022-09-29 17:01 ` Alex Bennée
2022-09-25 10:51 ` [PATCH v5 15/17] accel/tcg: Introduce tb_pc and tb_pc_log Richard Henderson
2022-09-25 10:51 ` [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL Richard Henderson
2022-09-30 12:02 ` Peter Maydell
2022-09-30 12:59 ` Alex Bennée
2022-09-30 13:25 ` Peter Maydell
2022-09-30 14:57 ` Alex Bennée
2022-09-30 15:08 ` Peter Maydell
2022-09-30 17:35 ` Richard Henderson
2022-09-25 10:51 ` [PATCH v5 17/17] accel/tcg: Split log_cpu_exec into inline and slow path Richard Henderson
2022-09-29 2:16 ` [PATCH v5 00/17] tcg: CPUTLBEntryFull and TARGET_TB_PCREL Richard Henderson
2022-09-29 6:53 ` Mark Cave-Ayland
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