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Thu, 11 May 2023 16:49:10 +0100 (BST) References: <20230503072331.1747057-1-richard.henderson@linaro.org> <20230503072331.1747057-11-richard.henderson@linaro.org> User-agent: mu4e 1.11.4; emacs 29.0.90 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Cc: ale@rev.ng, philmd@linaro.org, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, anjo@rev.ng, qemu-devel@nongnu.org Subject: Re: [PATCH 10/84] accel/tcg: Widen plugin_gen_empty_mem_callback to i64 Date: Thu, 11 May 2023 16:47:16 +0100 In-reply-to: <20230503072331.1747057-11-richard.henderson@linaro.org> Message-ID: <87r0rm27ih.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Richard Henderson writes: > Since we do this inside gen_empty_mem_cb anyway, let's > do this earlier inside tcg expansion. > > Signed-off-by: Richard Henderson > --- > include/exec/plugin-gen.h | 4 ++-- > accel/tcg/plugin-gen.c | 9 +++------ > tcg/tcg-op-ldst.c | 28 ++++++++++++++++++++-------- > 3 files changed, 25 insertions(+), 16 deletions(-) > > diff --git a/include/exec/plugin-gen.h b/include/exec/plugin-gen.h > index 5f5506f1cc..3af0168e65 100644 > --- a/include/exec/plugin-gen.h > +++ b/include/exec/plugin-gen.h > @@ -27,7 +27,7 @@ void plugin_gen_insn_start(CPUState *cpu, const struct = DisasContextBase *db); > void plugin_gen_insn_end(void); >=20=20 > void plugin_gen_disable_mem_helpers(void); > -void plugin_gen_empty_mem_callback(TCGv addr, uint32_t info); > +void plugin_gen_empty_mem_callback(TCGv_i64 addr, uint32_t info); >=20=20 > static inline void plugin_insn_append(abi_ptr pc, const void *from, size= _t size) > { > @@ -69,7 +69,7 @@ static inline void plugin_gen_tb_end(CPUState *cpu) > static inline void plugin_gen_disable_mem_helpers(void) > { } >=20=20 > -static inline void plugin_gen_empty_mem_callback(TCGv addr, uint32_t inf= o) > +static inline void plugin_gen_empty_mem_callback(TCGv_i64 addr, uint32_t= info) > { } >=20=20 > static inline void plugin_insn_append(abi_ptr pc, const void *from, size= _t size) > diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c > index 55e892b684..34be1b940c 100644 > --- a/accel/tcg/plugin-gen.c > +++ b/accel/tcg/plugin-gen.c > @@ -124,23 +124,20 @@ static void gen_empty_inline_cb(void) > tcg_temp_free_i64(val); > } >=20=20 > -static void gen_empty_mem_cb(TCGv vaddr, uint32_t info) > +static void gen_empty_mem_cb(TCGv_i64 addr, uint32_t info) You bounced the name a few times in this series: 445a4a2f14 accel/tcg: Widen plugin_gen_empty_mem_callback to i64 modified accel/tcg/plugin-gen.c @@ -127,3 +127,3 @@ -static void gen_empty_mem_cb(TCGv vaddr, uint32_t info) +static void gen_empty_mem_cb(TCGv_i64 addr, uint32_t info) { TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); 8b99baa592 accel/tcg: Merge do_gen_mem_cb into caller modified accel/tcg/plugin-gen.c @@ -148,3 +127,3 @@ -static void gen_empty_mem_cb(TCGv addr, uint32_t info) +static void gen_empty_mem_cb(TCGv vaddr, uint32_t info) { - do_gen_mem_cb(addr, info); + TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); 38b47b19ec plugin-gen: add module for TCG-related code modified accel/tcg/plugin-gen.c @@ -0,0 +145,3 @@ +static void gen_empty_mem_cb(TCGv addr, uint32_t info) +{ + do_gen_mem_cb(addr, info); Otherwise: Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro