From: "Alex Bennée" <alex.bennee@linaro.org>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bin.meng@windriver.com>,
Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org,
Jean-Christophe Dubois <jcd@tribudubois.net>
Subject: Re: [PATCH v2 2/4] hw/msic: imx6_ccm: Correct register value for silicon type
Date: Tue, 05 Jan 2021 09:22:47 +0000 [thread overview]
Message-ID: <87r1mz3fgy.fsf@linaro.org> (raw)
In-Reply-To: <1608704767-9317-3-git-send-email-bmeng.cn@gmail.com>
Bin Meng <bmeng.cn@gmail.com> writes:
> From: Bin Meng <bin.meng@windriver.com>
>
> Currently when U-Boot boots, it prints "??" for i.MX processor:
>
> CPU: Freescale i.MX?? rev1.0 at 792 MHz
>
> The register that was used to determine the silicon type is
> undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we
> can refer to get_cpu_rev() in arch/arm/mach-imx/mx6/soc.c in
> the U-Boot source codes that USB_ANALOG_DIGPROG is used.
>
> Update its reset value to indicate i.MX6Q.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
next prev parent reply other threads:[~2021-01-05 9:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-23 6:26 [PATCH v2 0/4] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot Bin Meng
2020-12-23 6:26 ` [PATCH v2 1/4] hw/misc: imx6_ccm: Update PMU_MISC0 reset value Bin Meng
2021-01-05 3:51 ` Bin Meng
2021-01-05 9:23 ` Alex Bennée
2021-01-05 9:27 ` Bin Meng
2021-01-05 9:23 ` Alex Bennée
2020-12-23 6:26 ` [PATCH v2 2/4] hw/msic: imx6_ccm: Correct register value for silicon type Bin Meng
2021-01-05 9:22 ` Alex Bennée [this message]
2020-12-23 6:26 ` [PATCH v2 3/4] hw/arm: sabrelite: Connect the Ethernet PHY at address 6 Bin Meng
2020-12-23 6:26 ` [PATCH v2 4/4] docs/system: arm: Add sabrelite board description Bin Meng
2021-01-05 9:21 ` Alex Bennée
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