From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MCNbb-00014K-7e for qemu-devel@nongnu.org; Thu, 04 Jun 2009 20:48:23 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MCNbZ-00012N-AR for qemu-devel@nongnu.org; Thu, 04 Jun 2009 20:48:22 -0400 Received: from [199.232.76.173] (port=48109 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MCMV3-0007fT-BB for qemu-devel@nongnu.org; Thu, 04 Jun 2009 19:37:34 -0400 Received: from lechat.rtp-net.org ([88.191.19.38]:43442) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MC8xn-0003Tl-W0 for qemu-devel@nongnu.org; Thu, 04 Jun 2009 05:10:20 -0400 From: Arnaud Patard (Rtp) Subject: Re: [Qemu-devel] [PATCH] fix configure for mips o32 References: <87prdlv6wf.fsf@lechat.rtp-net.org> <200906031546.00539.paul@codesourcery.com> <87ws7ttkch.fsf@lechat.rtp-net.org> <200906031622.48342.paul@codesourcery.com> Date: Thu, 04 Jun 2009 11:18:59 +0200 In-Reply-To: <200906031622.48342.paul@codesourcery.com> (Paul Brook's message of "Wed\, 3 Jun 2009 16\:22\:47 +0100") Message-ID: <87r5y0tkzg.fsf@lechat.rtp-net.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: qemu-devel@nongnu.org Paul Brook writes: Hi, > On Wednesday 03 June 2009, Arnaud Patard wrote: >> Paul Brook writes: >> > On Wednesday 03 June 2009, Arnaud Patard wrote: >> >> The commit 1ad2134f914dfd4c8f92307c94c9a5a1e28f0059 is defining >> >> target_phys_bits and set it to 64 for all mips machines including mipsel >> >> machines which are 32 bit. This patch set it to 32. >> > >> > MIPS32 CPUs have a 36-bit physical address space. That's what the old >> > code said anyway. >> >> Is there more information than that in the old code ? I really thought >> mips32 4Kc have 32-bit address paths not 36. > > I suspect you're confusing physical and virtual addresses. > fwiw, found out where I read that. At http://www.mips.com/products/processors/hard-ip-cores/4kc-hard-ip-core/. Arnaud