From: Cornelia Huck <cohuck@redhat.com>
To: "Daniel P. Berrangé" <berrange@redhat.com>
Cc: eric.auger.pro@gmail.com, eric.auger@redhat.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
kvmarm@lists.linux.dev, peter.maydell@linaro.org,
richard.henderson@linaro.org, alex.bennee@linaro.org,
maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com,
shameerali.kolothum.thodi@huawei.com, armbru@redhat.com,
abologna@redhat.com, jdenemar@redhat.com, agraf@csgraf.de,
shahuang@redhat.com, mark.rutland@arm.com, philmd@linaro.org,
pbonzini@redhat.com
Subject: Re: [PATCH v3 08/10] arm/cpu: more customization for the kvm host cpu model
Date: Fri, 16 May 2025 17:13:30 +0200 [thread overview]
Message-ID: <87sel4bnc5.fsf@redhat.com> (raw)
In-Reply-To: <aCdSZD5n2GCRXjVQ@redhat.com>
On Fri, May 16 2025, Daniel P. Berrangé <berrange@redhat.com> wrote:
> On Fri, May 16, 2025 at 04:51:34PM +0200, Cornelia Huck wrote:
>> On Wed, May 14 2025, Daniel P. Berrangé <berrange@redhat.com> wrote:
>>
>> > On Wed, May 14, 2025 at 05:36:58PM +0200, Cornelia Huck wrote:
>> >> On Tue, May 13 2025, Daniel P. Berrangé <berrange@redhat.com> wrote:
>> >>
>> >> > On Mon, Apr 14, 2025 at 06:38:47PM +0200, Cornelia Huck wrote:
>> >> >> From: Eric Auger <eric.auger@redhat.com>
>> >> >>
>> >> >> If the interface for writable ID registers is available, expose uint64
>> >> >> SYSREG properties for writable ID reg fields exposed by the host
>> >> >> kernel. Properties are named SYSREG_<REG>_<FIELD> with REG and FIELD
>> >> >> being those used in linux arch/arm64/tools/sysreg. This done by
>> >> >> matching the writable fields retrieved from the host kernel against the
>> >> >> generated description of sysregs.
>> >> >>
>> >> >> An example of invocation is:
>> >> >> -cpu host,SYSREG_ID_AA64ISAR0_EL1_DP=0x0
>> >> >> which sets DP field of ID_AA64ISAR0_EL1 to 0.
>> >> >
>> >> > For the value you are illustrating 0x0 - is this implying that
>> >> > all the flags take an arbitrary integer hex value ?
>> >> >
>> >> > This would be different from x86, where CPU feature flags are
>> >> > a boolean on/off state.
>> >>
>> >> Most of the fields are 4 bits, the allowed values vary (there are also
>> >> some fields that are single bits, or wider.) The FEAT_xxx values (which
>> >> can be expressed via ID register fields, or a combination thereof) are
>> >> mostly boolean, but there are also some of them that can take values.
>> >>
>> >> We could cook up pseudo-features that are always on/off, but I don't
>> >> like that approach: they would be QEMU only, whereas the ID register
>> >> fields and FEAT_xxx features are all defined in the Arm documentation.
>> >
>> > Fortunately from a libvirt POV we can likely expand our config
>> > to cope with hex values for arm features without too much
>> > trouble.
>> >
>> >>
>> >> An additional difference from x86 would be that FEAT_xxx featues are not
>> >> neccessarily configurable (only if the host kernel supports changing the
>> >> ID register field(s) backing the feature.)
>> >
>> > Is the kernel able to tell us which ones are configurable and which
>> > are not ? If so, it'd be helpful to expose this info in QAPI some
>> > place.
>>
>> The kernel can tell us which ID register fields are writable (we won't
>> generate properties if we don't.) For FEAT_xxx, this depends on how
>> we'll end up handling them (maybe we should only expose them if all ID
>> register bits backing them are actually writable.)
>>
>> What worries me a bit is that QEMU exposing a certain set of FEAT_xxx
>> values could be interpreted as "those features are present, any other
>> features aren't", while it is only the list of configurable features.
>>
>> Another issue: If libvirt is trying to baseline two cpus, it might end
>> up creating a model that looks sane on paper, but migrations will fail
>> because there are differences in non-writable bits. It would be much
>> better if libvirt could detect beforehand that there was no common
>> determinator. Not yet sure how to handle this.
>
> For "host" model that's probably not the end of the world. Apps have
> already given up strong guarantee of migration compat by using 'host'
> CPU and so in that context libvirt's feature comparison can assume
> the underlying silicon is a match and just compare features.
>
>
> In that sense the ability to list features and baseline two cpus
> lets you guarantee that whatever CPU you boot the guest on, will
> have at least those requested features. That's useful, even if it
> does not give you a strong migration compat guarantee.
>
> Doing better would require info on non-writable features, and
> possibly even that might not be sufficient to guarantee compat
We'd probably want to use named models rather than 'host' for better
generic handling, but that's a whole different can of worms that I'd
prefer to keep closed right now.
OTOH, 'host' with some features tweaked is already useful if you want to
migrate across machines in a heterogeneous environment with known
players (i.e. you know that the various machines only differ in features
that you can actually configure.)
next prev parent reply other threads:[~2025-05-16 15:13 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-14 16:38 [PATCH v3 00/10] kvm/arm: Introduce a customizable aarch64 KVM host model Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 01/10] arm/cpu: Add infra to handle generated ID register definitions Cornelia Huck
2025-05-13 13:52 ` Eric Auger
2025-05-13 14:05 ` Cornelia Huck
2025-05-13 15:12 ` Eric Auger
2025-04-14 16:38 ` [PATCH v3 02/10] arm/cpu: Add sysreg properties generation Cornelia Huck
2025-04-15 7:09 ` Philippe Mathieu-Daudé
2025-04-15 7:20 ` Philippe Mathieu-Daudé
2025-05-19 14:49 ` Cornelia Huck
2025-05-13 15:23 ` Daniel P. Berrangé
2025-05-14 15:25 ` Cornelia Huck
2025-05-14 15:29 ` Daniel P. Berrangé
2025-04-14 16:38 ` [PATCH v3 03/10] arm/cpu: Add generated sysreg properties Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 04/10] kvm: kvm_get_writable_id_regs Cornelia Huck
2025-05-13 14:20 ` Eric Auger
2025-05-13 14:42 ` Cornelia Huck
2025-05-13 15:16 ` Eric Auger
2025-04-14 16:38 ` [PATCH v3 05/10] arm/cpu: accessors for writable id registers Cornelia Huck
2025-04-29 16:27 ` Sebastian Ott
2025-04-30 13:48 ` Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 06/10] arm/kvm: Allow reading all the writable ID registers Cornelia Huck
2025-05-13 14:31 ` Eric Auger
2025-05-16 14:17 ` Cornelia Huck
2025-05-20 14:05 ` Cornelia Huck
2025-05-23 8:27 ` Shameerali Kolothum Thodi via
2025-05-26 12:37 ` Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 07/10] arm/kvm: write back modified ID regs to KVM Cornelia Huck
2025-04-15 7:03 ` Philippe Mathieu-Daudé
2025-04-15 9:54 ` Cornelia Huck
2025-05-13 14:33 ` Eric Auger
2025-07-02 4:01 ` Jinqian Yang via
2025-07-02 8:46 ` Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 08/10] arm/cpu: more customization for the kvm host cpu model Cornelia Huck
2025-05-13 14:47 ` Eric Auger
2025-05-13 15:56 ` Daniel P. Berrangé
2025-05-16 14:42 ` Cornelia Huck
2025-05-13 15:59 ` Daniel P. Berrangé
2025-05-14 15:36 ` Cornelia Huck
2025-05-14 18:22 ` Daniel P. Berrangé
2025-05-16 14:51 ` Cornelia Huck
2025-05-16 14:57 ` Daniel P. Berrangé
2025-05-16 15:13 ` Cornelia Huck [this message]
2025-04-14 16:38 ` [PATCH v3 09/10] arm-qmp-cmds: introspection for ID register props Cornelia Huck
2025-05-13 14:50 ` Eric Auger
2025-04-14 16:38 ` [PATCH v3 10/10] arm/cpu-features: document ID reg properties Cornelia Huck
2025-05-13 15:09 ` Eric Auger
2025-05-13 16:23 ` Daniel P. Berrangé
2025-05-13 15:29 ` [PATCH v3 00/10] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2025-05-14 13:47 ` Shameerali Kolothum Thodi via
2025-05-14 14:47 ` Eric Auger
2025-05-23 13:23 ` Shameerali Kolothum Thodi via
2025-05-26 12:44 ` Cornelia Huck
2025-05-27 10:06 ` Cornelia Huck
2025-06-03 15:14 ` Cornelia Huck
2025-06-04 10:58 ` Shameerali Kolothum Thodi via
2025-06-04 12:35 ` Cornelia Huck
2025-06-04 13:45 ` Shameerali Kolothum Thodi via
2025-06-05 16:31 ` Cornelia Huck
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