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X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liviu Ionescu , keithp@keithp.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Benjamin Herrenschmidt writes: > On Tue, 2020-01-14 at 09:32 +0200, Liviu Ionescu wrote: >> > On 14 Jan 2020, at 08:25, Benjamin Herrenschmidt < >> > benh@kernel.crashing.org> wrote: >> >=20 >> > I noticed that the bulk of arm-semi.c (or riscv-semi.c) is >> > trivially >> > made completely generic by doing a couple of changes: >>=20 >> Last year I did a similar exercise in OpenOCD, where I took the Arm >> semihosting code from the Arm specific location, extracted the common >> part, updated it for latest Arm 64-bit specs, and then used the >> common code for both Arm and RISC-V. >>=20 >> If you think useful, you might take a look there too. > > Well, one of the LCA talks wasn't that interesting so I started doing > it and am almost done :-) > > I'll look at doing something for arm, riscv and ppc and send patches > once I get it working. Cool. Are you considering linux-user as well or are these only things that make sense for system emulation? > > Cheers, > Ben. > >>=20 >> Regards, >>=20 >> Liviu --=20 Alex Benn=C3=A9e