From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2A85FED2DD for ; Thu, 12 Mar 2026 07:55:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w0asj-0000eo-Lf; Thu, 12 Mar 2026 03:54:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w0asi-0000eg-88 for qemu-devel@nongnu.org; Thu, 12 Mar 2026 03:54:56 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w0asd-0000n7-Ne for qemu-devel@nongnu.org; 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Thu, 12 Mar 2026 07:54:44 +0000 (UTC) Received: from blackfin.pond.sub.org (unknown [10.45.242.12]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 258A319560B7; Thu, 12 Mar 2026 07:54:43 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 728FB21E681B; Thu, 12 Mar 2026 08:54:41 +0100 (CET) From: Markus Armbruster To: Thomas Huth Cc: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Richard Henderson Subject: Re: [PATCH] target/mips/cpu: Move initialization of memory region to realize function In-Reply-To: <20260311211629.118608-1-thuth@redhat.com> (Thomas Huth's message of "Wed, 11 Mar 2026 22:16:29 +0100") References: <20260311211629.118608-1-thuth@redhat.com> Date: Thu, 12 Mar 2026 08:54:41 +0100 Message-ID: <87tsulzdmm.fsf@pond.sub.org> User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass client-ip=170.10.129.124; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -3 X-Spam_score: -0.4 X-Spam_bar: / X-Spam_report: (-0.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Thomas Huth writes: > From: Thomas Huth > > When introspecting the Loongson-3A4000 CPUs from the command line, QEMU > currently crashes: > > $ ./qemu-system-mips64el -device Loongson-3A4000-mips64-cpu,help > qemu-system-mips64el: ../../devel/qemu/system/physmem.c:1401: > register_multipage: Assertion `num_pages' failed. > Aborted (core dumped) > > Move the initialization of the memory regions to the realize function > to fix this problem. > > Reported-by: Markus Armbruster > Signed-off-by: Thomas Huth See also my ramblings in reply to the related xtensa patch: Subject: Re: [PATCH] target/xtensa/cpu: Move initialization of memory region to realize function Date: Thu, 12 Mar 2026 08:51:43 +0100 Message-ID: <87y0jxzdrk.fsf@pond.sub.org> > --- > target/mips/cpu.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/target/mips/cpu.c b/target/mips/cpu.c > index e424d115018..5f88c077dbf 100644 > --- a/target/mips/cpu.c > +++ b/target/mips/cpu.c > @@ -460,6 +460,14 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) > MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); > Error *local_err = NULL; > > +#ifndef CONFIG_USER_ONLY > + if (mcc->cpu_def->lcsr_cpucfg2 & (1 << CPUCFG2_LCSRP)) { > + memory_region_init_io(&env->iocsr.mr, OBJECT(cpu), NULL, > + env, "iocsr", UINT64_MAX); > + address_space_init(&env->iocsr.as, &env->iocsr.mr, "IOCSR"); > + } > +#endif > + > if (!clock_get(cpu->clock)) { > #ifndef CONFIG_USER_ONLY > if (!qtest_enabled()) { > @@ -504,14 +512,6 @@ static void mips_cpu_initfn(Object *obj) > cpu->count_div = clock_new(OBJECT(obj), "clk-div-count"); > env->count_clock = clock_new(OBJECT(obj), "clk-count"); > env->cpu_model = mcc->cpu_def; > -#ifndef CONFIG_USER_ONLY > - if (mcc->cpu_def->lcsr_cpucfg2 & (1 << CPUCFG2_LCSRP)) { > - memory_region_init_io(&env->iocsr.mr, OBJECT(cpu), NULL, > - env, "iocsr", UINT64_MAX); > - address_space_init(&env->iocsr.as, > - &env->iocsr.mr, "IOCSR"); > - } > -#endif > } > > static char *mips_cpu_type_name(const char *cpu_model) Tested-by: Markus Armbruster