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Sun, 18 Apr 2021 09:31:45 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id b12sm20587019wrn.18.2021.04.18.09.31.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Apr 2021 09:31:44 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 1640A1FF7E; Sun, 18 Apr 2021 17:31:44 +0100 (BST) References: <20210417194205.17057-1-peter.maydell@linaro.org> User-agent: mu4e 1.5.11; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Peter Maydell Subject: Re: [PULL 0/7] queue of proposed rc4 fixes Date: Sun, 18 Apr 2021 17:31:00 +0100 In-reply-to: <20210417194205.17057-1-peter.maydell@linaro.org> Message-ID: <87tuo38sgg.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Peter Maydell writes: > This pullreq contains fixes for the remaining "not fixed yet" issues > in the 6.0 Planning page: > * Fix compile failures of C++ files with new glib headers > * mps3-an547: Use correct Cortex-M55 CPU and don't disable its FPU > * accel/tcg: Fix assertion failure executing from non-RAM with -icount > > None of these are 100% rc4-worthy on their own, but taken all together > I think they justify rolling another release candidate. If you are rolling it would be nice to include: checkpatch: Fix use of uninitialized value Message-Id: <161786467973.295167.5612704777283969903.stgit@bahia.lan> just to avoid the messy warning in the CI checkpatch check. > > thanks > -- PMM > > The following changes since commit 8fe9f1f891eff4e37f82622b7480ee748bf4af= 74: > > Update version for v6.0.0-rc3 release (2021-04-14 22:06:18 +0100) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-ar= m-20210417 > > for you to fetch changes up to 277aed998ac2cd3649bf0e13b22f47769519eb61: > > accel/tcg: avoid re-translating one-shot instructions (2021-04-17 18:51= :14 +0100) > > ---------------------------------------------------------------- > Fixes for rc4: > * Fix compile failures of C++ files with new glib headers > * mps3-an547: Use correct Cortex-M55 CPU and don't disable its FPU > * accel/tcg: Fix assertion failure executing from non-RAM with -icount > > ---------------------------------------------------------------- > Alex Benn=C3=A9e (2): > target/arm: drop CF_LAST_IO/dc->condjump check > accel/tcg: avoid re-translating one-shot instructions > > Paolo Bonzini (2): > osdep: include glib-compat.h before other QEMU headers > osdep: protect qemu/osdep.h with extern "C" > > Peter Maydell (3): > include/qemu/osdep.h: Move system includes to top > hw/arm/armsse: Give SSE-300 its own Property array > hw/arm/armsse: Make SSE-300 use Cortex-M55 > > include/qemu/compiler.h | 6 ++++++ > include/qemu/osdep.h | 38 +++++++++++++++++++++++++++++--------- > accel/tcg/translate-all.c | 2 +- > hw/arm/armsse.c | 24 +++++++++++++++++++----- > target/arm/translate.c | 5 ----- > disas/arm-a64.cc | 2 +- > disas/nanomips.cpp | 2 +- > 7 files changed, 57 insertions(+), 22 deletions(-) --=20 Alex Benn=C3=A9e