From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: j@getutm.app, qemu-devel@nongnu.org
Subject: Re: [PATCH v3 01/41] tcg: Enhance flush_icache_range with separate data pointer
Date: Fri, 06 Nov 2020 20:31:41 +0000 [thread overview]
Message-ID: <87tuu28bwy.fsf@linaro.org> (raw)
In-Reply-To: <20201106032921.600200-2-richard.henderson@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> We are shortly going to have a split rw/rx jit buffer. Depending
> on the host, we need to flush the dcache at the rw data pointer and
> flush the icache at the rx code pointer.
>
> For now, the two passed pointers are identical, so there is no
> effective change in behaviour.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/aarch64/tcg-target.h | 9 +++++++--
> tcg/arm/tcg-target.h | 8 ++++++--
> tcg/i386/tcg-target.h | 3 ++-
> tcg/mips/tcg-target.h | 8 ++++++--
> tcg/ppc/tcg-target.h | 2 +-
> tcg/riscv/tcg-target.h | 8 ++++++--
> tcg/s390/tcg-target.h | 3 ++-
> tcg/sparc/tcg-target.h | 8 +++++---
> tcg/tci/tcg-target.h | 3 ++-
> softmmu/physmem.c | 9 ++++++++-
> tcg/tcg.c | 6 ++++--
> tcg/aarch64/tcg-target.c.inc | 2 +-
> tcg/mips/tcg-target.c.inc | 2 +-
> tcg/ppc/tcg-target.c.inc | 21 +++++++++++----------
> tcg/sparc/tcg-target.c.inc | 4 ++--
> 15 files changed, 64 insertions(+), 32 deletions(-)
>
> diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
> index 663dd0b95e..d0a6a059b7 100644
> --- a/tcg/aarch64/tcg-target.h
> +++ b/tcg/aarch64/tcg-target.h
> @@ -148,9 +148,14 @@ typedef enum {
> #define TCG_TARGET_DEFAULT_MO (0)
> #define TCG_TARGET_HAS_MEMORY_BSWAP 1
>
> -static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
> +/* Flush the dcache at RW, and the icache at RX, as necessary. */
> +static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
> {
> - __builtin___clear_cache((char *)start, (char *)stop);
> + /* TODO: Copy this from gcc to avoid 4 loops instead of 2. */
Why not do it now?
> + if (rw != rx) {
> + __builtin___clear_cache((char *)rw, (char *)(rw + len));
> + }
> + __builtin___clear_cache((char *)rx, (char *)(rx + len));
> }
>
<snip>
>
> -static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
> +/* Flush the dcache at RW, and the icache at RX, as necessary. */
> +static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
> {
> }
I take it i386 is just too primitive to care about flushing things?
Anyway:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
next prev parent reply other threads:[~2020-11-06 20:32 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-06 3:28 [PATCH v3 00/41] Mirror map JIT memory for TCG Richard Henderson
2020-11-06 3:28 ` [PATCH v3 01/41] tcg: Enhance flush_icache_range with separate data pointer Richard Henderson
2020-11-06 20:31 ` Alex Bennée [this message]
2020-11-06 22:51 ` Richard Henderson
2020-11-07 21:08 ` Alex Bennée
2020-11-06 3:28 ` [PATCH v3 02/41] tcg: Move tcg prologue pointer out of TCGContext Richard Henderson
2020-11-07 21:10 ` Alex Bennée
2020-11-06 3:28 ` [PATCH v3 03/41] tcg: Move tcg epilogue " Richard Henderson
2020-11-06 3:28 ` [PATCH v3 04/41] tcg: Add in_code_gen_buffer Richard Henderson
2020-11-06 3:28 ` [PATCH v3 05/41] tcg: Introduce tcg_splitwx_to_{rx,rw} Richard Henderson
2020-11-06 3:28 ` [PATCH v3 06/41] tcg: Adjust TCGLabel for const Richard Henderson
2020-11-06 3:28 ` [PATCH v3 07/41] tcg: Adjust tcg_out_call " Richard Henderson
2020-11-06 3:28 ` [PATCH v3 08/41] tcg: Adjust tcg_out_label " Richard Henderson
2020-11-06 3:28 ` [PATCH v3 09/41] tcg: Adjust tcg_register_jit " Richard Henderson
2020-11-06 3:28 ` [PATCH v3 10/41] tcg: Adjust tb_target_set_jmp_target for split-wx Richard Henderson
2020-11-06 3:28 ` [PATCH v3 11/41] tcg: Make DisasContextBase.tb const Richard Henderson
2020-11-06 3:28 ` [PATCH v3 12/41] tcg: Make tb arg to synchronize_from_tb const Richard Henderson
2020-11-06 3:28 ` [PATCH v3 13/41] tcg: Use Error with alloc_code_gen_buffer Richard Henderson
2020-11-06 3:28 ` [PATCH v3 14/41] tcg: Add --accel tcg,split-wx property Richard Henderson
2020-11-06 3:28 ` [PATCH v3 15/41] accel/tcg: Support split-wx for linux with memfd Richard Henderson
2020-11-10 17:03 ` Alex Bennée
2020-11-10 17:26 ` Richard Henderson
2020-11-06 3:28 ` [PATCH v3 16/41] accel/tcg: Support split-wx for darwin/iOS with vm_remap Richard Henderson
2020-11-08 3:37 ` Joelle van Dyne
2020-11-10 17:37 ` Alex Bennée
2020-11-10 17:57 ` Joelle van Dyne
2020-11-06 3:28 ` [PATCH v3 17/41] tcg: Return the TB pointer from the rx region from exit_tb Richard Henderson
2020-11-06 3:28 ` [PATCH v3 18/41] tcg/i386: Support split-wx code generation Richard Henderson
2020-11-06 3:28 ` [PATCH v3 19/41] tcg/aarch64: Use B not BL for tcg_out_goto_long Richard Henderson
2020-11-06 3:29 ` [PATCH v3 20/41] tcg/aarch64: Implement flush_idcache_range manually Richard Henderson
2020-11-06 3:29 ` [PATCH v3 21/41] tcg/aarch64: Support split-wx code generation Richard Henderson
2020-11-06 3:29 ` [PATCH v3 22/41] disas: Push const down through host disasassembly Richard Henderson
2020-11-06 3:29 ` [PATCH v3 23/41] tcg/tci: Push const down through bytecode reading Richard Henderson
2020-11-06 3:29 ` [PATCH v3 24/41] tcg: Introduce tcg_tbrel_diff Richard Henderson
2020-11-06 3:29 ` [PATCH v3 25/41] tcg/ppc: Use tcg_tbrel_diff Richard Henderson
2020-11-06 3:29 ` [PATCH v3 26/41] tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB Richard Henderson
2020-11-06 3:29 ` [PATCH v3 27/41] tcg/ppc: Support split-wx code generation Richard Henderson
2020-11-06 3:29 ` [PATCH v3 28/41] tcg/sparc: Use tcg_tbrel_diff Richard Henderson
2020-11-06 3:29 ` [PATCH v3 29/41] tcg/sparc: Support split-wx code generation Richard Henderson
2020-11-06 3:29 ` [PATCH v3 30/41] tcg/s390: Use tcg_tbrel_diff Richard Henderson
2020-11-06 3:29 ` [PATCH v3 31/41] tcg/s390: Support split-wx code generation Richard Henderson
2020-11-06 3:29 ` [PATCH v3 32/41] tcg/riscv: Fix branch range checks Richard Henderson
2020-11-06 3:29 ` [PATCH v3 33/41] tcg/riscv: Remove branch-over-branch fallback Richard Henderson
2020-11-06 3:29 ` [PATCH v3 34/41] tcg/riscv: Support split-wx code generation Richard Henderson
2020-11-06 3:29 ` [PATCH v3 35/41] accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd Richard Henderson
2020-11-06 3:29 ` [PATCH v3 36/41] tcg/mips: Do not assert on relocation overflow Richard Henderson
2020-11-06 3:29 ` [PATCH v3 37/41] tcg/mips: Support split-wx code generation Richard Henderson
2020-11-06 3:29 ` [PATCH v3 38/41] tcg/arm: " Richard Henderson
2020-11-06 3:29 ` [PATCH v3 39/41] tcg: Remove TCG_TARGET_SUPPORT_MIRROR Richard Henderson
2020-11-06 3:29 ` [PATCH v3 40/41] tcg: Constify tcg_code_gen_epilogue Richard Henderson
2020-11-06 3:29 ` [PATCH v3 41/41] tcg: Constify TCGLabelQemuLdst.raddr Richard Henderson
2020-11-06 4:00 ` [PATCH v3 00/41] Mirror map JIT memory for TCG no-reply
2020-11-08 3:38 ` Joelle van Dyne
2020-11-17 3:47 ` Joelle van Dyne
2020-11-17 15:20 ` Richard Henderson
2020-11-17 15:31 ` Joelle van Dyne
2020-11-17 17:26 ` Alex Bennée
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