From: "Alex Bennée" <alex.bennee@linaro.org>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
Cc: qemu-devel@nongnu.org, "Aurelien Jarno" <aurelien@aurel32.net>,
"Fam Zheng" <famz@redhat.com>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Richard Henderson" <rth@twiddle.net>,
"Riku Voipio" <riku.voipio@iki.fi>,
"Yongbok Kim" <yongbok.kim@mips.com>,
"Aleksandar Markovic" <aleksandar.markovic@mips.com>,
"Goran Ferenc" <goran.ferenc@mips.com>,
"Miodrag Dinic" <miodrag.dinic@mips.com>,
"Petar Jovanovic" <petar.jovanovic@mips.com>,
"Raghu Gandham" <raghu.gandham@mips.com>
Subject: Re: [Qemu-devel] [PATCH v2 3/6] hw/mips_int: hold BQL for all interrupt requests
Date: Wed, 04 Apr 2018 11:23:42 +0100 [thread overview]
Message-ID: <87tvsrclsh.fsf@linaro.org> (raw)
In-Reply-To: <1519324303-5674-4-git-send-email-aleksandar.markovic@rt-rk.com>
Aleksandar Markovic <aleksandar.markovic@rt-rk.com> writes:
> From: Aleksandar Markovic <aleksandar.markovic@mips.com>
>
> Make sure BQL is held for all interrupt requests.
>
> For MTTCG-enabled configurations, handling soft and hard interrupts
> between vCPUs must be properly locked. By acquiring BQL, make sure
> all paths triggering an IRQ are synchronized.
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/mips/mips_int.c | 12 ++++++++++++
> target/mips/op_helper.c | 21 +++------------------
> 2 files changed, 15 insertions(+), 18 deletions(-)
>
> diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
> index 48192d2..5ddeb15 100644
> --- a/hw/mips/mips_int.c
> +++ b/hw/mips/mips_int.c
> @@ -21,6 +21,7 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/main-loop.h"
> #include "hw/hw.h"
> #include "hw/mips/cpudevs.h"
> #include "cpu.h"
> @@ -32,10 +33,17 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level)
> MIPSCPU *cpu = opaque;
> CPUMIPSState *env = &cpu->env;
> CPUState *cs = CPU(cpu);
> + bool locked = false;
>
> if (irq < 0 || irq > 7)
> return;
>
> + /* Make sure locking works even if BQL is already held by the caller */
> + if (!qemu_mutex_iothread_locked()) {
> + locked = true;
> + qemu_mutex_lock_iothread();
> + }
> +
> if (level) {
> env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
>
> @@ -56,6 +64,10 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level)
> } else {
> cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
> }
> +
> + if (locked) {
> + qemu_mutex_unlock_iothread();
> + }
> }
>
> void cpu_mips_irq_init_cpu(MIPSCPU *cpu)
> diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
> index 44a9b06..6bd8e59 100644
> --- a/target/mips/op_helper.c
> +++ b/target/mips/op_helper.c
> @@ -17,7 +17,6 @@
> * License along with this library; if not, see <http://www.gnu.org/licenses/>.
> */
> #include "qemu/osdep.h"
> -#include "qemu/main-loop.h"
> #include "cpu.h"
> #include "internal.h"
> #include "qemu/host-utils.h"
> @@ -809,11 +808,7 @@ target_ulong helper_mftc0_tcschefback(CPUMIPSState *env)
>
> target_ulong helper_mfc0_count(CPUMIPSState *env)
> {
> - int32_t count;
> - qemu_mutex_lock_iothread();
> - count = (int32_t) cpu_mips_get_count(env);
> - qemu_mutex_unlock_iothread();
> - return count;
> + return (int32_t)cpu_mips_get_count(env);
> }
>
> target_ulong helper_mftc0_entryhi(CPUMIPSState *env)
> @@ -1388,9 +1383,7 @@ void helper_mtc0_hwrena(CPUMIPSState *env, target_ulong arg1)
>
> void helper_mtc0_count(CPUMIPSState *env, target_ulong arg1)
> {
> - qemu_mutex_lock_iothread();
> cpu_mips_store_count(env, arg1);
> - qemu_mutex_unlock_iothread();
> }
>
> void helper_mtc0_entryhi(CPUMIPSState *env, target_ulong arg1)
> @@ -1439,9 +1432,7 @@ void helper_mttc0_entryhi(CPUMIPSState *env, target_ulong arg1)
>
> void helper_mtc0_compare(CPUMIPSState *env, target_ulong arg1)
> {
> - qemu_mutex_lock_iothread();
> cpu_mips_store_compare(env, arg1);
> - qemu_mutex_unlock_iothread();
> }
>
> void helper_mtc0_status(CPUMIPSState *env, target_ulong arg1)
> @@ -1495,9 +1486,7 @@ void helper_mtc0_srsctl(CPUMIPSState *env, target_ulong arg1)
>
> void helper_mtc0_cause(CPUMIPSState *env, target_ulong arg1)
> {
> - qemu_mutex_lock_iothread();
> cpu_mips_store_cause(env, arg1);
> - qemu_mutex_unlock_iothread();
> }
>
> void helper_mttc0_cause(CPUMIPSState *env, target_ulong arg1)
> @@ -2339,16 +2328,12 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env)
>
> target_ulong helper_rdhwr_cc(CPUMIPSState *env)
> {
> - int32_t count;
> check_hwrena(env, 2, GETPC());
> #ifdef CONFIG_USER_ONLY
> - count = env->CP0_Count;
> + return env->CP0_Count;
> #else
> - qemu_mutex_lock_iothread();
> - count = (int32_t)cpu_mips_get_count(env);
> - qemu_mutex_unlock_iothread();
> + return (int32_t)cpu_mips_get_count(env);
> #endif
> - return count;
> }
>
> target_ulong helper_rdhwr_ccres(CPUMIPSState *env)
--
Alex Bennée
next prev parent reply other threads:[~2018-04-04 10:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-22 18:31 [Qemu-devel] [PATCH v2 0/6] target-mips: support MTTCG feature Aleksandar Markovic
2018-02-22 18:31 ` [Qemu-devel] [PATCH v2 1/6] target/mips: compare virtual addresses in LL/SC sequence Aleksandar Markovic
2018-02-22 18:31 ` [Qemu-devel] [PATCH v2 2/6] target/mips: reimplement SC instruction emulation and use cmpxchg Aleksandar Markovic
2018-02-22 22:33 ` Emilio G. Cota
2018-02-22 22:39 ` Emilio G. Cota
2018-02-22 18:31 ` [Qemu-devel] [PATCH v2 3/6] hw/mips_int: hold BQL for all interrupt requests Aleksandar Markovic
2018-04-04 10:23 ` Alex Bennée [this message]
2018-04-04 11:23 ` Paolo Bonzini
2018-04-04 13:44 ` Alex Bennée
2018-04-04 14:42 ` Paolo Bonzini
2018-02-22 18:31 ` [Qemu-devel] [PATCH v2 4/6] target/mips: hold BQL in mips_vpe_wake() Aleksandar Markovic
2018-04-04 10:24 ` Alex Bennée
2018-02-22 18:31 ` [Qemu-devel] [PATCH v2 5/6] hw/mips_cpc: kick a VP when putting it into Run state Aleksandar Markovic
2018-04-04 10:25 ` Alex Bennée
2018-02-22 18:31 ` [Qemu-devel] [PATCH v2 6/6] target/mips: introduce MTTCG-enabled builds Aleksandar Markovic
2018-04-04 10:25 ` Alex Bennée
2018-04-04 10:27 ` [Qemu-devel] [PATCH v2 0/6] target-mips: support MTTCG feature Alex Bennée
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