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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, cota@braap.org, pbonzini@redhat.com,
	Aurelien Jarno <aurelien@aurel32.net>,
	Yongbok Kim <yongbok.kim@imgtec.com>
Subject: Re: [Qemu-devel] [PATCH v2 3/5] target/mips: Exit after enabling interrupts
Date: Thu, 15 Jun 2017 09:57:29 +0100	[thread overview]
Message-ID: <87tw3hmxvq.fsf@linaro.org> (raw)
In-Reply-To: <20170614194821.8754-4-rth@twiddle.net>


Richard Henderson <rth@twiddle.net> writes:

> From: Paolo Bonzini <pbonzini@redhat.com>
>
> Exit to cpu loop so we reevaluate cpu_mips_hw_interrupts.
>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Cc: Yongbok Kim <yongbok.kim@imgtec.com>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target/mips/translate.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 559f8fe..891f14b 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -13403,9 +13403,11 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
>                  save_cpu_state(ctx, 1);
>                  gen_helper_ei(t0, cpu_env);
>                  gen_store_gpr(t0, rs);
> -                /* Stop translation as we may have switched the execution mode */
> -                ctx->bstate = BS_STOP;
>                  tcg_temp_free(t0);
> +                /* BS_STOP isn't good enough here;
> +                   reevaluate cpu_mips_hw_interrupts_enabled.  */

nit: technically we want to ensure mips_cpu_exec_interrupt is run (which
calls cpu_mips_hw_interrupts_enabled)

> +                gen_save_pc(ctx->pc + 4);
> +                ctx->bstate = BS_EXCP;
>              }
>              break;
>          default:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

--
Alex Bennée

  reply	other threads:[~2017-06-15  8:57 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-14 19:48 [Qemu-devel] [PATCH v2 0/5] Fixes for TCG hangs Richard Henderson
2017-06-14 19:48 ` [Qemu-devel] [PATCH v2 1/5] tcg: Refactor helper_lookup_tb_ptr Richard Henderson
2017-06-14 20:27   ` [Qemu-devel] [PATCH] tcg-runtime: increase hit rate of lookup_tb_ptr Emilio G. Cota
2017-06-15  1:21     ` Richard Henderson
2017-06-15  8:35   ` [Qemu-devel] [PATCH v2 1/5] tcg: Refactor helper_lookup_tb_ptr Alex Bennée
2017-06-16 20:19   ` Emilio G. Cota
2017-06-16 20:46     ` Richard Henderson
2017-06-14 19:48 ` [Qemu-devel] [PATCH v2 2/5] target/alpha: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-06-14 20:37   ` Emilio G. Cota
2017-06-15  1:21     ` Richard Henderson
2017-06-15  8:48   ` Alex Bennée
2017-06-15 20:55     ` Richard Henderson
2017-06-15 21:57       ` Philippe Mathieu-Daudé
2017-06-16  2:56         ` Richard Henderson
2017-06-14 19:48 ` [Qemu-devel] [PATCH v2 3/5] target/mips: Exit after enabling interrupts Richard Henderson
2017-06-15  8:57   ` Alex Bennée [this message]
2017-06-15 14:16     ` Paolo Bonzini
2017-06-15 21:19   ` Aurelien Jarno
2017-06-15 21:29     ` Richard Henderson
2017-06-14 19:48 ` [Qemu-devel] [PATCH v2 4/5] target/s390x: Exit after changing PSW mask Richard Henderson
2017-06-15  9:00   ` Alex Bennée
2017-06-14 19:48 ` [Qemu-devel] [PATCH v2 5/5] target/arm: Exit after clearing interrupt mask Richard Henderson
2017-06-14 20:33   ` [Qemu-devel] [PATCH] target/aarch64: exit to main loop after 'msr daifclr' Emilio G. Cota
2017-06-14 21:13     ` no-reply
2017-06-15  1:20     ` Richard Henderson
2017-06-15  5:19       ` Emilio G. Cota
2017-06-15  8:30   ` [Qemu-devel] [PATCH v2 5/5] target/arm: Exit after clearing interrupt mask Alex Bennée
2017-06-14 20:22 ` [Qemu-devel] [PATCH v2 0/5] Fixes for TCG hangs no-reply
2017-06-14 20:26 ` no-reply

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