From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:45210)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <alex.bennee@linaro.org>) id 1YYEUO-0004I1-TN
	for qemu-devel@nongnu.org; Wed, 18 Mar 2015 09:58:29 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <alex.bennee@linaro.org>) id 1YYEUI-0000NJ-5f
	for qemu-devel@nongnu.org; Wed, 18 Mar 2015 09:58:28 -0400
Received: from static.88-198-71-155.clients.your-server.de
	([88.198.71.155]:53679 helo=socrates.bennee.com)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <alex.bennee@linaro.org>) id 1YYEUH-0000Mm-VY
	for qemu-devel@nongnu.org; Wed, 18 Mar 2015 09:58:22 -0400
References: <1426620735-2454-1-git-send-email-peter.maydell@linaro.org>
	<20150317193816.GB23225@cbox>
From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
In-reply-to: <20150317193816.GB23225@cbox>
Date: Wed, 18 Mar 2015 13:58:40 +0000
Message-ID: <87twxis8z3.fsf@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: 8bit
Subject: Re: [Qemu-devel] [PATCH v2] target-arm: Store SPSR_EL1 state in
	banked_spsr[1] (SPSR_svc)
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>, Greg Bellows <greg.bellows@linaro.org>, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, patches@linaro.org


Christoffer Dall <christoffer.dall@linaro.org> writes:

> On Tue, Mar 17, 2015 at 07:32:15PM +0000, Peter Maydell wrote:
>> The AArch64 SPSR_EL1 register is architecturally mandated to
>> be mapped to the AArch32 SPSR_svc register. This means its
>> state should live in QEMU's env->banked_spsr[1] field.
>> Correct the various places in the code that incorrectly
>> put it in banked_spsr[0].
>> 
>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
>
> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
>
>
> Alex, will you respin the SPSR patch based on this one then?  You can
> change the authorship on the SPSR patch to yourself if you prefer.

Yeah I'll re-spin the series hopefully by the end of this week or early next.

>
> Thanks,
> -Christoffer

-- 
Alex Bennée