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From: Anthony Liguori <aliguori@us.ibm.com>
To: "Andreas Färber" <afaerber@suse.de>, "Anton Blanchard" <anton@samba.org>
Cc: qemu-ppc@nongnu.org, Alexander Graf <agraf@suse.de>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/5] target-ppc: USE LPCR_ILE to control exception endian on POWER7
Date: Wed, 07 Aug 2013 07:47:40 -0500	[thread overview]
Message-ID: <87txj1k6qb.fsf@codemonkey.ws> (raw)
In-Reply-To: <5201DC85.90001@suse.de>

Andreas Färber <afaerber@suse.de> writes:

> Am 07.08.2013 02:47, schrieb Anton Blanchard:
>> On POWER7, LPCR_ILE is used to control what endian guests take
>> their exceptions in so use it instead of MSR_ILE.
>> 
>> Signed-off-by: Anton Blanchard <anton@samba.org>
>> ---
>>  target-ppc/cpu.h         |  2 ++
>>  target-ppc/excp_helper.c | 10 ++++++++++
>>  2 files changed, 12 insertions(+)
>> 
>> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
>> index 711db08..422a6bb 100644
>> --- a/target-ppc/cpu.h
>> +++ b/target-ppc/cpu.h
>> @@ -453,6 +453,8 @@ struct ppc_slb_t {
>>  #define MSR_RI   1  /* Recoverable interrupt                        1        */
>>  #define MSR_LE   0  /* Little-endian mode                           1 hflags */
>>  
>> +#define LPCR_ILE (1 << (63-38))
>> +
>>  #define msr_sf   ((env->msr >> MSR_SF)   & 1)
>>  #define msr_isf  ((env->msr >> MSR_ISF)  & 1)
>>  #define msr_shv  ((env->msr >> MSR_SHV)  & 1)
>> diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
>> index e9fcad8..e957761 100644
>> --- a/target-ppc/excp_helper.c
>> +++ b/target-ppc/excp_helper.c
>> @@ -611,9 +611,19 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
>>          tlb_flush(env, 1);
>>      }
>>  
>> +#ifdef TARGET_PPC64
>> +    if (excp_model == POWERPC_EXCP_POWER7) {
>> +        if (env->spr[SPR_LPCR] & LPCR_ILE) {
>> +            new_msr |= (target_ulong)1 << MSR_LE;
>> +        }
>> +    } else if (msr_ile) {
>> +        new_msr |= (target_ulong)1 << MSR_LE;
>> +    }
>> +#else
>
> You could just do
>
> ...
>     } else
> #endif
>
> to spare duplicating the msr_ile path.

If the condition was more complicated, I'd agree, but I really dislike
splitting statements up via an #ifdef.

Regards,

Anthony Liguori

>
> Andreas
>
>>      if (msr_ile) {
>>          new_msr |= (target_ulong)1 << MSR_LE;
>>      }
>> +#endif
>>  
>>      /* Jump to handler */
>>      vector = env->excp_vectors[excp];
>> 
>
>
> -- 
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

  reply	other threads:[~2013-08-07 12:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-07  0:46 [Qemu-devel] [PATCH 0/5] 64bit PowerPC little endian support Anton Blanchard
2013-08-07  0:47 ` [Qemu-devel] [PATCH 1/5] target-ppc: POWER7 supports the MSR_LE bit Anton Blanchard
2013-08-07  1:05   ` Anthony Liguori
2013-08-14 13:27     ` Alexander Graf
2013-08-07  0:47 ` [Qemu-devel] [PATCH 2/5] target-ppc: USE LPCR_ILE to control exception endian on POWER7 Anton Blanchard
2013-08-07  1:06   ` Anthony Liguori
2013-08-14 11:49     ` Alexander Graf
2013-08-07  5:35   ` Andreas Färber
2013-08-07 12:47     ` Anthony Liguori [this message]
2013-08-07  0:47 ` [Qemu-devel] [PATCH 3/5] pseries: Add H_SET_MODE hcall to change guest exception endianness Anton Blanchard
2013-08-07  1:10   ` Anthony Liguori
2013-08-19 11:04     ` [Qemu-devel] [PATCH] " Anton Blanchard
2013-08-28 14:00       ` Alexander Graf
2013-08-07  0:47 ` [Qemu-devel] [PATCH 4/5] disas/ppc.c: Fix little endian disassembly Anton Blanchard
2013-08-07  1:10   ` Anthony Liguori
2013-08-14 13:31   ` Alexander Graf
2013-08-07  0:47 ` [Qemu-devel] [PATCH 5/5] pseries: Fix loading of little endian kernels Anton Blanchard
2013-08-07  1:11   ` Anthony Liguori
2013-08-07  1:13 ` [Qemu-devel] [PATCH 0/5] 64bit PowerPC little endian support Anthony Liguori

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