From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 050F2C41513 for ; Wed, 16 Aug 2023 15:04:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qWI4D-0003s3-Ps; Wed, 16 Aug 2023 11:04:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qWI2j-0003Gg-PI for qemu-devel@nongnu.org; Wed, 16 Aug 2023 11:02:45 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qWI2e-00043h-W3 for qemu-devel@nongnu.org; Wed, 16 Aug 2023 11:02:41 -0400 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-313e742a787so3969637f8f.1 for ; Wed, 16 Aug 2023 08:02:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1692198154; x=1692802954; h=content-transfer-encoding:mime-version:message-id:in-reply-to:date :subject:cc:to:from:user-agent:references:from:to:cc:subject:date :message-id:reply-to; bh=ZrpXjRweFhxq7P4zGv1mrpSVyjjmAYOh2C49DzjH8UE=; b=oR3N2b4faDO2eHyiVVbKi+bKjDii070sM0GfbPdqE41KXieP6U6KfCfbUu9nG2/lpM Zj+9W5jJFQm/uFKrPCBvPvqQmcN/Bq8YbVBatqn5/qDYB8JXBpzPW5lu+XY0+JRUucgq u4IFOYfv9OIxzfAGTvRdk7uQRKBbfZoCgXJI+RW1i0/6IH2qW9BIyJkh5Vppm/7e6PFd DbQJnlo8l3H4LD4GI7kj4otLE3IE9Sqbz3pZ4kJDOL27OAuwWwl5wG7eo8N+8OJ4R3TH K748TZCu/9bV0F4EpElMIORmuFhA5e07rTfCwcjj1W8jjzDgV4dTjfyS9OZtfEdF+0SL w+4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692198154; x=1692802954; h=content-transfer-encoding:mime-version:message-id:in-reply-to:date :subject:cc:to:from:user-agent:references:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=ZrpXjRweFhxq7P4zGv1mrpSVyjjmAYOh2C49DzjH8UE=; b=KQI/HwpYN+mJkFYuFh9H6XhTxn+VL+IEYsy6OFAdTWwBjWE0X6Bm/EVBRnTKG9ywAi ALmDGlWdso2kf21vdFc1yUQxVYgMsCrnZGndQakxIM4q2E/zjls26ruoY9tkpIaLPA1x jeexfI3cLm9IBBWAJCb4n+uIehoXnSaA2N6HCu0nz5uIss+XwN137YjvGwxw6WUISMxc vOOLJk5K7iNY3T0c1ZMG+sNsFmssc1iy1ViBV/cGIH/TaYILXBPoQqa+lbsHjD9l0VbQ a7MzjeyynnDLi4b40hgVqzd9ARZcjyfnIzpKNxH9EdvvCbwOC7yiJFr6yxqso4dfujHB vQdA== X-Gm-Message-State: AOJu0YwLjSiUAzd8GWENY4bHu70euQvDhL4+g3+QzYvUGyvM/RX4/l79 0QsBllgpfnT61MWEGynTVw/Xsg== X-Google-Smtp-Source: AGHT+IH6kDf9T14NIbTPrTjwVUqkV8+FjFxeq/mQSrTUfi0ZDqlsjVbJUWMsmQAulX3joie0+mVybA== X-Received: by 2002:a05:6000:4e6:b0:314:c6b:b9a2 with SMTP id cr6-20020a05600004e600b003140c6bb9a2mr1771976wrb.13.1692198153764; Wed, 16 Aug 2023 08:02:33 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id t11-20020adfe44b000000b0030fd03e3d25sm21832382wrm.75.2023.08.16.08.02.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Aug 2023 08:02:33 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id D85EA1FFBB; Wed, 16 Aug 2023 16:02:32 +0100 (BST) References: <20230731084354.115015-1-akihiko.odaki@daynix.com> <20230731084354.115015-7-akihiko.odaki@daynix.com> <871qg5sryb.fsf@linaro.org> User-agent: mu4e 1.11.14; emacs 29.1.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Alex =?utf-8?Q?Benn=C3=A9e?= , Akihiko Odaki Cc: Paolo Bonzini , Thomas Huth , Alexandre Iooss , Mahmoud Mandour , Eduardo Habkost , Marcel Apfelbaum , Philippe =?utf-8?Q?Mathieu-Daud?= =?utf-8?Q?=C3=A9?= , Yanan Wang , Richard Henderson , =?utf-8?Q?Marc-Andr=C3=A9?= Lureau , =?utf-8?Q?Daniel_P=2E_Berrang=C3=A9?= , John Snow , Cleber Rosa , Peter Maydell , Michael Rolnik , "Edgar E. Iglesias" , Brian Cain , Song Gao , Xiaojuan Yang , Laurent Vivier , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Chris Wulff , Marek Vasut , Stafford Horne , Daniel Henrique Barboza , =?utf-8?Q?C=C3=A9dric?= Le Goater , David Gibson , Greg Kurz , Nicholas Piggin , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei , Yoshinori Sato , David Hildenbrand , Ilya Leoshkevich , Mark Cave-Ayland , Artyom Tarasenko , Bastian Koppelmann , Max Filippov , qemu-devel@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Subject: Re: [RFC PATCH 06/24] hw/core/cpu: Replace gdb_core_xml_file with gdb_core_feature Date: Wed, 16 Aug 2023 16:00:48 +0100 In-reply-to: Message-ID: <87v8dfni7r.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Akihiko Odaki writes: > On 2023/08/14 20:59, Alex Benn=C3=A9e wrote: >> Akihiko Odaki writes: >>=20 >>> This is a tree-wide change to replace gdb_core_xml_file, the path to >>> GDB XML file with gdb_core_feature, the pointer to GDBFeature. This >>> also replaces the values assigned to gdb_num_core_regs with the >>> num_regs member of GDBFeature where applicable to remove magic numbers. >>> >>> A following change will utilize additional information provided by >>> GDBFeature to simplify XML file lookup. >>> >>> Signed-off-by: Akihiko Odaki >>> --- >>> include/hw/core/cpu.h | 5 +++-- >>> target/s390x/cpu.h | 2 -- >>> gdbstub/gdbstub.c | 6 +++--- >>> target/arm/cpu.c | 4 ++-- >>> target/arm/cpu64.c | 4 ++-- >>> target/arm/tcg/cpu32.c | 3 ++- >>> target/avr/cpu.c | 4 ++-- >>> target/hexagon/cpu.c | 2 +- >>> target/i386/cpu.c | 7 +++---- >>> target/loongarch/cpu.c | 4 ++-- >>> target/m68k/cpu.c | 7 ++++--- >>> target/microblaze/cpu.c | 4 ++-- >>> target/ppc/cpu_init.c | 4 ++-- >>> target/riscv/cpu.c | 7 ++++--- >>> target/rx/cpu.c | 4 ++-- >>> target/s390x/cpu.c | 4 ++-- >>> 16 files changed, 36 insertions(+), 35 deletions(-) >>> >>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >>> index fdcbe87352..84219c1885 100644 >>> --- a/include/hw/core/cpu.h >>> +++ b/include/hw/core/cpu.h >>> @@ -23,6 +23,7 @@ >>> #include "hw/qdev-core.h" >>> #include "disas/dis-asm.h" >>> #include "exec/cpu-common.h" >>> +#include "exec/gdbstub.h" >>> #include "exec/hwaddr.h" >>> #include "exec/memattrs.h" >>> #include "qapi/qapi-types-run-state.h" >>> @@ -127,7 +128,7 @@ struct SysemuCPUOps; >>> * breakpoint. Used by AVR to handle a gdb mis-feature with >>> * its Harvard architecture split code and data. >>> * @gdb_num_core_regs: Number of core registers accessible to GDB. >> It seems redundant to have this when gdb_core_features already >> encapsulates this, especially since... >>=20 >>> - * @gdb_core_xml_file: File name for core registers GDB XML descriptio= n. >>> + * @gdb_core_feature: GDB core feature description. >>> * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU= to stop >>> * before the insn which triggers a watchpoint rather than = after it. >>> * @gdb_arch_name: Optional callback that returns the architecture na= me known >>> @@ -163,7 +164,7 @@ struct CPUClass { >>> int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); >>> vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr); >>> - const char *gdb_core_xml_file; >>> + const GDBFeature *gdb_core_feature; >>> gchar * (*gdb_arch_name)(CPUState *cpu); >>> const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xm= lname); >>>=20=20=20 >> >>> diff --git a/target/arm/cpu.c b/target/arm/cpu.c >>> index d71a162070..a206ab6b1b 100644 >>> --- a/target/arm/cpu.c >>> +++ b/target/arm/cpu.c >>> @@ -2353,7 +2353,6 @@ static void arm_cpu_class_init(ObjectClass *oc, v= oid *data) >>> #ifndef CONFIG_USER_ONLY >>> cc->sysemu_ops =3D &arm_sysemu_ops; >>> #endif >>> - cc->gdb_num_core_regs =3D 26; >>> cc->gdb_arch_name =3D arm_gdb_arch_name; >>> cc->gdb_get_dynamic_xml =3D arm_gdb_get_dynamic_xml; >>> cc->gdb_stop_before_watchpoint =3D true; >>> @@ -2378,7 +2377,8 @@ static void cpu_register_class_init(ObjectClass *= oc, void *data) >>> CPUClass *cc =3D CPU_CLASS(acc); >>> acc->info =3D data; >>> - cc->gdb_core_xml_file =3D "arm-core.xml"; >>> + cc->gdb_core_feature =3D gdb_find_static_feature("arm-core.xml"); >>> + cc->gdb_num_core_regs =3D cc->gdb_core_feature->num_regs; >> You are doing assignments like this. I think something like this in >> gdbstub: >> modified gdbstub/gdbstub.c >> @@ -440,7 +440,7 @@ int gdb_read_register(CPUState *cpu, GByteArray *buf= , int reg, bool has_xml) >> CPUArchState *env =3D cpu->env_ptr; >> GDBRegisterState *r; >> - if (reg < cc->gdb_num_core_regs) { >> + if (reg < cc->gdb_core_feature->num_regs) { >> return cc->gdb_read_register(cpu, buf, reg, has_xml); >> } >> @@ -459,7 +459,7 @@ static int gdb_write_register(CPUState *cpu, >> uint8_t *mem_buf, int reg, >> CPUArchState *env =3D cpu->env_ptr; >> GDBRegisterState *r; >> - if (reg < cc->gdb_num_core_regs) { >> + if (reg < cc->gdb_core_feature->num_regs) { >> return cc->gdb_write_register(cpu, mem_buf, reg, has_xml); >> } >> makes most of the uses go away. Some of the other arches might need >> target specific tweaks. > > The problem is how to deal with the target specific tweaks. ppc > requires gdb_num_core_regs to have some value greater than > cc->gdb_core_feature->num_regs for compatibility with legacy GDB. > Other architectures simply do not have XMLs. Simply replacing > cc->gdb_num_core_regs with cc->gdb_core_feature->num_regs will break > those architectures. How about: int core_regs =3D cc->gdb_core_feature ? cc->gdb_core_feature->num_regs : cc->gdb_num_core_regs And document the field as for legacy gdb use only? > >> >>=20 --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro