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Ferst" Subject: Re: [PATCH v1 11/11] tests/tcg: add vectorised sha512 versions Date: Mon, 14 Feb 2022 15:14:30 +0000 In-reply-to: Message-ID: <87v8xhcwdf.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::529 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.635, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, Peter Maydell , berrange@redhat.com, David Hildenbrand , Richard Henderson , qemu-devel@nongnu.org, f4bug@amsat.org, Eduardo Habkost , "open list:S390 TCG CPUs" , qemu-arm@nongnu.org, stefanha@redhat.com, crosa@redhat.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" "Matheus K. Ferst" writes: > On 11/02/2022 13:03, Alex Benn=C3=A9e wrote: >> This builds vectorised versions of sha512 to exercise the vector code: >> - aarch64 (AdvSimd) >> - i386 (SSE) >> - s390x (MVX) >> - ppc64 (vector) >> Signed-off-by: Alex Benn=C3=A9e >> Reviewed-by: Richard Henderson >> Message-Id: <20220202191242.652607-5-alex.bennee@linaro.org> >> --- >> v2 >> - use -msse4.1 -O3 instead of -pentium4 for i386 build >> --- >> tests/tcg/multiarch/sha512.c | 2 +- >> tests/tcg/aarch64/Makefile.target | 7 +++++++ >> tests/tcg/arm/Makefile.target | 8 ++++++++ >> tests/tcg/i386/Makefile.target | 6 ++++++ >> tests/tcg/ppc64le/Makefile.target | 5 ++++- >> tests/tcg/s390x/Makefile.target | 9 +++++++++ >> tests/tcg/x86_64/Makefile.target | 7 +++++++ >> 7 files changed, 42 insertions(+), 2 deletions(-) >>=20 > > > >> diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makef= ile.target >> index 480ff0898d..4f1d03dfcf 100644 >> --- a/tests/tcg/ppc64le/Makefile.target >> +++ b/tests/tcg/ppc64le/Makefile.target >> @@ -5,10 +5,13 @@ >> VPATH +=3D $(SRC_PATH)/tests/tcg/ppc64le >> ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),) >> -PPC64LE_TESTS=3Dbcdsub non_signalling_xscv >> +PPC64LE_TESTS=3Dbcdsub non_signalling_xscv sha512-vector >> endif >> $(PPC64LE_TESTS): CFLAGS +=3D -mpower8-vector >>=20 > > Since this test does not target a specific instruction, maybe it > should use -mvsx/-maltivec to allow the compiler to use newer > instructions. I wasn't sure which vector instructions are supported by the TCG front ends so if the above flags won't trip up the TCG I can add them to the cflags. > >> +sha512-vector: sha512.c >> + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) >> + > > Can we have this test for big-endian too? We have tests/tcg/ppc64 so sure... > > Thanks, > Matheus K. Ferst > Instituto de Pesquisas ELDORADO > Analista de Software > Aviso Legal - Disclaimer --=20 Alex Benn=C3=A9e