From: Pranith Kumar <bobby.prani@gmail.com>
To: Stefan Hajnoczi <stefanha@gmail.com>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
qemu-devel <qemu-devel@nongnu.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] MTTCG memory ordering
Date: Wed, 12 Oct 2016 11:30:11 -0400 [thread overview]
Message-ID: <87vawxd1q4.fsf@gmail.com> (raw)
In-Reply-To: <CAJSP0QUdQXsExVGhZB8bKuTta85uh88JXq6QfOC9=dJ0tw=ixA@mail.gmail.com>
Hi Stefan,
Stefan Hajnoczi writes:
> Hi Pranith,
> I was curious about the status of your MTTCG GSoC work:
>
> I saw your fence series which implements the noop memory barrier/fence
> instructions on various architectures, but I wasn't sure if that also
> covers the case where a strong target is emulated on a weak host.
>
No, this work is still pending. The current implementation only supports weak
on strong (the simplest case) by emitting barriers explicitly.
> Did you make TCG automatically emit barriers so stronger targets (x86)
> run correctly on weaker targets (ARM)?
We did consider doing this by emitting barriers implicitly for each memory
instruction of a strong target but decided that it would be too costly. There
is, AFAIK, no trivial solution to avoiding this overhead as of now.
I will start working on this next step soon, once I finish the tcg test setup.
Thanks,
--
Pranith
next prev parent reply other threads:[~2016-10-12 15:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-12 8:58 [Qemu-devel] MTTCG memory ordering Stefan Hajnoczi
2016-10-12 15:17 ` Laszlo Ersek
2016-10-12 15:30 ` Pranith Kumar [this message]
2016-10-12 21:55 ` Emilio G. Cota
2016-10-14 16:29 ` Stefan Hajnoczi
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