From: Cornelia Huck <cohuck@redhat.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Saif Abrar" <saif.abrar@linux.vnet.ibm.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: npiggin@gmail.com, fbarrat@linux.ibm.com, mst@redhat.com,
marcel.apfelbaum@gmail.com, pbonzini@redhat.com,
thuth@redhat.com, lvivier@redhat.com
Subject: Re: [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register
Date: Mon, 25 Mar 2024 15:37:18 +0100 [thread overview]
Message-ID: <87wmpq74yp.fsf@redhat.com> (raw)
In-Reply-To: <9268c807-27f4-4c50-bb08-8bb97f0d84fe@kaod.org>
On Mon, Mar 25 2024, Cédric Le Goater <clg@kaod.org> wrote:
> On 3/21/24 11:04, Saif Abrar wrote:
>> PHB updates the register PCIE Link-Control-2.
>> Set the write-mask bits for TLS, ENTER_COMP, TX_MARGIN,
>> HASD, MOD_COMP, COMP_SOS and COMP_P_DE.
>
>
> You should resend this patch independently of the PowerNV PHB changes.
>
>
> Thanks,
>
> C.
>
>
>
>> Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
>> ---
>> hw/pci/pcie.c | 6 ++++++
>> include/standard-headers/linux/pci_regs.h | 3 +++
>> 2 files changed, 9 insertions(+)
This patch also needs to be split: the code under standard-headers/ is
updated via a Linux headers update, which should either be a full update
against a released kernel version (can be -rc), or a placeholder patch
if the changes have not yet been merged.
next prev parent reply other threads:[~2024-03-25 14:39 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-21 10:04 [PATCH 00/10] pnv/phb4: Update PHB4 to the latest spec PH5 Saif Abrar
2024-03-21 10:04 ` [PATCH 01/10] qtest/phb4: Add testbench for PHB4 Saif Abrar
2024-03-25 9:39 ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 02/10] pnv/phb4: Add reset logic to PHB4 Saif Abrar
2024-03-25 13:32 ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 03/10] pnv/phb4: Implement sticky reset logic in PHB4 Saif Abrar
2024-03-21 10:04 ` [PATCH 04/10] pnv/phb4: Implement read-only and write-only bits of registers Saif Abrar
2024-03-25 14:15 ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 05/10] pnv/phb4: Implement write-clear and return 1's on unimplemented reg read Saif Abrar
2024-03-25 13:58 ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 06/10] pnv/phb4: Set link-active status in HPSTAT and LMR registers Saif Abrar
2024-03-21 10:04 ` [PATCH 07/10] pnv/phb4: Set link speed and width in the DLP training control register Saif Abrar
2024-03-25 13:36 ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 08/10] pnv/phb4: Implement IODA PCT table Saif Abrar
2024-03-25 13:35 ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register Saif Abrar
2024-03-25 13:35 ` Cédric Le Goater
2024-03-25 14:37 ` Cornelia Huck [this message]
2024-03-21 10:04 ` [PATCH 10/10] pnv/phb4: Mask off LSI Source-ID based on number of interrupts Saif Abrar
2024-03-25 13:34 ` Cédric Le Goater
2024-03-27 9:59 ` Saif Abrar
2024-03-27 16:19 ` Cédric Le Goater
2024-03-28 9:31 ` Saif Abrar
2024-09-16 10:41 ` [PATCH 00/10] pnv/phb4: Update PHB4 to the latest spec PH5 Cédric Le Goater
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