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X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liviu Ionescu , keithp@keithp.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Benjamin Herrenschmidt writes: > On Tue, 2020-01-14 at 09:51 +0000, Alex Benn=C3=A9e wrote: >> > Well, one of the LCA talks wasn't that interesting so I started >> > doing >> > it and am almost done :-) >> >=20 >> > I'll look at doing something for arm, riscv and ppc and send >> > patches >> > once I get it working. >>=20 >> Cool. Are you considering linux-user as well or are these only things >> that make sense for system emulation? > > There seem to be some linux-user stuff in there, I'm mostly considering > whatever ARM does today but we can certainly extend later. Depends on if it is to be used. AFAIK the main users of arm linux user are compiler test cases for M-profile CPUs.=20 > The idea is to make sure ARM, RiscV and POWER use the same protocol and > code base to make picolibc (and others) life easier. Bug compatible > :-) Hmm, I'm not so sure. QEMU tries to emulate real HW although I appreciate that is a somewhat loose definition once you get to things like -M virt and other such SW like abstractions. Is semihosting even going to be a thing on real RiscV/Power silicon? > > Cheers, > Ben. --=20 Alex Benn=C3=A9e