From: "Alex Bennée" <alex.bennee@linaro.org>
To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
qemu-ppc@nongnu.org, david@gibson.dropbear.id.au,
rth@twiddle.net, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH RFC 4/4] target-ppc: flush tlb from all the cpu
Date: Sun, 04 Sep 2016 18:00:40 +0100 [thread overview]
Message-ID: <87wpirbnwn.fsf@linaro.org> (raw)
In-Reply-To: <87y43akb51.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me>
Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> writes:
> Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
>
>> On Fri, 2016-09-02 at 12:02 +0530, Nikunj A Dadhania wrote:
>>> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
>>> ---
>>> cputlb.c| 15 +++++++++++++++
>>> include/exec/exec-all.h |2 ++
>>> target-ppc/mmu-hash64.c |2 +-
>>> 3 files changed, 18 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/cputlb.c b/cputlb.c
>>> index 64faf47..17ff58e 100644
>>> --- a/cputlb.c
>>> +++ b/cputlb.c
>>> @@ -123,6 +123,21 @@ void tlb_flush(CPUState *cpu, int flush_global)
>>> }
>>> }
>>>
>>> +static void tlb_flush_all_async_work(CPUState *cpu, void *opaque)
>>> +{
>>> +tlb_flush_nocheck(cpu, GPOINTER_TO_INT(opaque));
>>> +}
>>> +
>>> +void tlb_flush_all(CPUState *cpu, int flush_global)
>>> +{
>>> +CPUState *c;
>>> +
>>> +CPU_FOREACH(c) {
>>> +async_run_on_cpu(c, tlb_flush_all_async_work,
>>> +GUINT_TO_POINTER(flush_global));
>>> +}
>>> +}
>>
>> Hrm... this is asynchronous?
>
> Yes.
>
>> It probably needs to be synchronous...
>
> I see run_on_cpu() which seems suitable.
I'm not so happy with run_on_cpu as it involves busy waiting for the
other CPU to finish.
>> We must provide a guarantee that no other processor can see the old
>> translation when the tlb invalidation sequence completes. With the
>> current lazy TLB flush, we already delay the invalidation until
>> we hit that synchronization point so we need to be synchronous.
When is the synchronisation point? On ARM we end the basic block on
system instructions that mess with the cache. As a result the flush is
done as soon as we exit the run loop on the next instruction.
>
>
>>> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
>>> index 8118143..d852c21 100644
>>> --- a/target-ppc/mmu-hash64.c
>>> +++ b/target-ppc/mmu-hash64.c
>>> @@ -912,7 +912,7 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu,
>>> * invalidate, and we still don't have a tlb_flush_mask(env, n,
>>> * mask) in QEMU, we just invalidate all TLBs
>>> */
>>> -tlb_flush(CPU(cpu), 1);
>>> +tlb_flush_all(CPU(cpu), 1);
>>> }
>>>
>>> void ppc_hash64_update_rmls(CPUPPCState *env)
>
> Regards,
> Nikunj
--
Alex Bennée
next prev parent reply other threads:[~2016-09-04 17:00 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 6:32 [Qemu-devel] [PATCH RFC 0/4] Enable MTTCG on PowerPC Nikunj A Dadhania
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 1/4] spapr-hcall: take iothread lock during handler call Nikunj A Dadhania
2016-09-02 8:53 ` Greg Kurz
2016-09-02 9:28 ` Nikunj A Dadhania
2016-09-02 9:57 ` Greg Kurz
2016-09-03 16:31 ` Nikunj A Dadhania
2016-09-02 10:06 ` Thomas Huth
2016-09-03 16:33 ` Nikunj A Dadhania
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 2/4] target-ppc: with MTTCG report more threads Nikunj A Dadhania
2016-09-02 9:28 ` Greg Kurz
2016-09-02 9:34 ` Nikunj A Dadhania
2016-09-02 10:45 ` Greg Kurz
2016-09-03 16:34 ` Nikunj A Dadhania
2016-09-07 3:51 ` David Gibson
2016-09-07 4:41 ` Nikunj A Dadhania
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 3/4] target-ppc: use atomic_cmpxchg for ld/st reservation Nikunj A Dadhania
2016-09-07 4:02 ` David Gibson
2016-09-07 4:47 ` Nikunj A Dadhania
2016-09-07 5:24 ` Benjamin Herrenschmidt
2016-09-07 8:42 ` Nikunj A Dadhania
2016-09-07 5:34 ` David Gibson
2016-09-07 7:13 ` Alex Bennée
2016-09-12 1:19 ` David Gibson
2016-09-12 8:39 ` Alex Bennée
2016-09-12 9:15 ` Benjamin Herrenschmidt
2016-09-02 6:32 ` [Qemu-devel] [PATCH RFC 4/4] target-ppc: flush tlb from all the cpu Nikunj A Dadhania
2016-09-02 7:22 ` Benjamin Herrenschmidt
2016-09-02 7:34 ` Nikunj A Dadhania
2016-09-04 17:00 ` Alex Bennée [this message]
2016-09-04 22:17 ` Benjamin Herrenschmidt
2016-09-05 0:10 ` Benjamin Herrenschmidt
2016-09-06 1:55 ` Nikunj A Dadhania
2016-09-06 3:05 ` Benjamin Herrenschmidt
2016-09-06 4:53 ` Nikunj A Dadhania
2016-09-06 5:30 ` Benjamin Herrenschmidt
2016-09-06 6:57 ` Nikunj A Dadhania
2016-09-02 6:43 ` [Qemu-devel] [PATCH RFC 0/4] Enable MTTCG on PowerPC Cédric Le Goater
2016-09-02 6:46 ` Nikunj A Dadhania
2016-09-02 7:57 ` Thomas Huth
2016-09-02 11:44 ` Cédric Le Goater
2016-09-02 7:19 ` Benjamin Herrenschmidt
2016-09-02 7:39 ` Nikunj A Dadhania
2016-09-02 12:13 ` Benjamin Herrenschmidt
2016-09-07 4:08 ` David Gibson
2016-09-07 4:48 ` Nikunj A Dadhania
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