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* AVX-512 instruction set
@ 2023-04-12  9:41 Walid Ghandour
  2023-04-12 12:13 ` Alex Bennée
  0 siblings, 1 reply; 5+ messages in thread
From: Walid Ghandour @ 2023-04-12  9:41 UTC (permalink / raw)
  To: qemu-devel

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Hello,

I am interested in adding AVX512 to qemu.

Is anyone currently working on this ?

If yes, when is it expected to be done ?

I was trying to run a C program and failed with the following error at this
instruction:




*62 f2 7d 48 18 0d fa 0c 00 00 vbroadcastss 0xcfa(%rip),%zmm1qemu: uncaught
target signal 4 (Illegal instruction) - core dumped*
I like to add support for broadcast and fmadd avx 512 instructions such as
the following one:


*62 e2 7d 48 b8 c9     vfmadd231ps %zmm1,%zmm0,%zmm17*
Thanks,
Walid

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: AVX-512 instruction set
  2023-04-12  9:41 AVX-512 instruction set Walid Ghandour
@ 2023-04-12 12:13 ` Alex Bennée
  2023-04-12 13:30   ` Paolo Bonzini
  0 siblings, 1 reply; 5+ messages in thread
From: Alex Bennée @ 2023-04-12 12:13 UTC (permalink / raw)
  To: Walid Ghandour
  Cc: qemu-devel, Paolo Bonzini, Richard Henderson, Eduardo Habkost


Walid Ghandour <waleedjghandour@gmail.com> writes:

> Hello,
>
> I am interested in adding AVX512 to qemu.

(add x86 TCG maintainers to CC)

> Is anyone currently working on this ?
>
> If yes, when is it expected to be done ?

I don't think there is currently any active effort to add AVX512
support. There have been various GSoC projects to improve the x86 SIMD
emulation but I don't think they got merged.

There has been some updates to improve the SSE emulation in the last few
releases and make the instruction decoder a little easier to work wit.

>
> I was trying to run a C program and failed with the following error at this instruction:
>
> 62 f2 7d 48 18 0d fa 0c 00 00 vbroadcastss 0xcfa(%rip),%zmm1
>
> qemu: uncaught target signal 4 (Illegal instruction) - core dumped
>
> I like to add support for broadcast and fmadd avx 512 instructions such as the following one: 
>
> 62 e2 7d 48 b8 c9     vfmadd231ps %zmm1,%zmm0,%zmm17
>
> Thanks,
> Walid


-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: AVX-512 instruction set
  2023-04-12 12:13 ` Alex Bennée
@ 2023-04-12 13:30   ` Paolo Bonzini
  2023-04-12 13:41     ` Walid Ghandour
  0 siblings, 1 reply; 5+ messages in thread
From: Paolo Bonzini @ 2023-04-12 13:30 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Walid Ghandour, qemu-devel, Richard Henderson, Eduardo Habkost

On Wed, Apr 12, 2023 at 2:17 PM Alex Bennée <alex.bennee@linaro.org> wrote:
> I don't think there is currently any active effort to add AVX512
> support. There have been various GSoC projects to improve the x86 SIMD
> emulation but I don't think they got merged.

No, there isn't. However, the recent implementation of AVX in QEMU 7.2
is designed to make AVX512 at least doable.

Adding support for AVX512 would be a very large work (at least 1
months full time plus time to get it merged), but not impossible. The
tasks could be something like this:

1. EVEX prefix decoding for AVX and AVX2 instructions
2. operand broadcast
3. VEX encoded mask instruction: kmov, kadd, kxnor, etc
4. other instructions and permutations with mask operands and permutations
5. opmask support including merging and zeroing
6. Disp8*N addressing mode
7. rounding control and exception suppression

It's important that, at any given step, the new functionality is
tested comprehensively.

> > 62 f2 7d 48 18 0d fa 0c 00 00 vbroadcastss 0xcfa(%rip),%zmm1
> >
> > qemu: uncaught target signal 4 (Illegal instruction) - core dumped
> >
> > I like to add support for broadcast and fmadd avx 512 instructions such as the following one:
> >
> > 62 e2 7d 48 b8 c9     vfmadd231ps %zmm1,%zmm0,%zmm17

Both of these are using a small subset of AVX512 (step 1 above). Both
vbroadcastss and vfmadd231ps are already implemented in QEMU, but not
using ZMM registers.

Unfortunately the base AVX512 functionality is large, and therefore
the above tasks are all needed to claim support for AVX512. On the
other hand, for historical reasons AVX512BW and AVX512VL extensions
are separate but in practice they are easier to just implement at the
same time as basic AVX512; my expectation is that they would come up
almost for free with the rest of the work.

Paolo



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: AVX-512 instruction set
  2023-04-12 13:30   ` Paolo Bonzini
@ 2023-04-12 13:41     ` Walid Ghandour
  2023-04-12 13:55       ` Paolo Bonzini
  0 siblings, 1 reply; 5+ messages in thread
From: Walid Ghandour @ 2023-04-12 13:41 UTC (permalink / raw)
  To: Paolo Bonzini
  Cc: Alex Bennée, qemu-devel, Richard Henderson, Eduardo Habkost

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I will try to work on this.

Regards,
Walid

Le mer. 12 avr. 2023 à 15:30, Paolo Bonzini <pbonzini@redhat.com> a écrit :

> On Wed, Apr 12, 2023 at 2:17 PM Alex Bennée <alex.bennee@linaro.org>
> wrote:
> > I don't think there is currently any active effort to add AVX512
> > support. There have been various GSoC projects to improve the x86 SIMD
> > emulation but I don't think they got merged.
>
> No, there isn't. However, the recent implementation of AVX in QEMU 7.2
> is designed to make AVX512 at least doable.
>
> Adding support for AVX512 would be a very large work (at least 1
> months full time plus time to get it merged), but not impossible. The
> tasks could be something like this:
>
> 1. EVEX prefix decoding for AVX and AVX2 instructions
> 2. operand broadcast
> 3. VEX encoded mask instruction: kmov, kadd, kxnor, etc
> 4. other instructions and permutations with mask operands and permutations
> 5. opmask support including merging and zeroing
> 6. Disp8*N addressing mode
> 7. rounding control and exception suppression
>
> It's important that, at any given step, the new functionality is
> tested comprehensively.
>
> > > 62 f2 7d 48 18 0d fa 0c 00 00 vbroadcastss 0xcfa(%rip),%zmm1
> > >
> > > qemu: uncaught target signal 4 (Illegal instruction) - core dumped
> > >
> > > I like to add support for broadcast and fmadd avx 512 instructions
> such as the following one:
> > >
> > > 62 e2 7d 48 b8 c9     vfmadd231ps %zmm1,%zmm0,%zmm17
>
> Both of these are using a small subset of AVX512 (step 1 above). Both
> vbroadcastss and vfmadd231ps are already implemented in QEMU, but not
> using ZMM registers.
>
> Unfortunately the base AVX512 functionality is large, and therefore
> the above tasks are all needed to claim support for AVX512. On the
> other hand, for historical reasons AVX512BW and AVX512VL extensions
> are separate but in practice they are easier to just implement at the
> same time as basic AVX512; my expectation is that they would come up
> almost for free with the rest of the work.
>
> Paolo
>
>

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: AVX-512 instruction set
  2023-04-12 13:41     ` Walid Ghandour
@ 2023-04-12 13:55       ` Paolo Bonzini
  0 siblings, 0 replies; 5+ messages in thread
From: Paolo Bonzini @ 2023-04-12 13:55 UTC (permalink / raw)
  To: Walid Ghandour
  Cc: Alex Bennée, qemu-devel, Richard Henderson, Eduardo Habkost

On Wed, Apr 12, 2023 at 3:41 PM Walid Ghandour
<waleedjghandour@gmail.com> wrote:
> I will try to work on this.

Even if the individual tasks I listed are not enough to implement
AVX512, I suggest that you post individual pieces of work so that you
can somewhat pipeline the work.

Also, please review the design of the AVX decoder and the
implementation of the translation and the tests. You can find the
patches at https://patchew.org/QEMU/20221013214651.672114-1-pbonzini@redhat.com/
(patches 3-4-6-8 especially).

Paolo

> Regards,
> Walid
>
> Le mer. 12 avr. 2023 à 15:30, Paolo Bonzini <pbonzini@redhat.com> a écrit :
>>
>> On Wed, Apr 12, 2023 at 2:17 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>> > I don't think there is currently any active effort to add AVX512
>> > support. There have been various GSoC projects to improve the x86 SIMD
>> > emulation but I don't think they got merged.
>>
>> No, there isn't. However, the recent implementation of AVX in QEMU 7.2
>> is designed to make AVX512 at least doable.
>>
>> Adding support for AVX512 would be a very large work (at least 1
>> months full time plus time to get it merged), but not impossible. The
>> tasks could be something like this:
>>
>> 1. EVEX prefix decoding for AVX and AVX2 instructions
>> 2. operand broadcast
>> 3. VEX encoded mask instruction: kmov, kadd, kxnor, etc
>> 4. other instructions and permutations with mask operands and permutations
>> 5. opmask support including merging and zeroing
>> 6. Disp8*N addressing mode
>> 7. rounding control and exception suppression
>>
>> It's important that, at any given step, the new functionality is
>> tested comprehensively.
>>
>> > > 62 f2 7d 48 18 0d fa 0c 00 00 vbroadcastss 0xcfa(%rip),%zmm1
>> > >
>> > > qemu: uncaught target signal 4 (Illegal instruction) - core dumped
>> > >
>> > > I like to add support for broadcast and fmadd avx 512 instructions such as the following one:
>> > >
>> > > 62 e2 7d 48 b8 c9     vfmadd231ps %zmm1,%zmm0,%zmm17
>>
>> Both of these are using a small subset of AVX512 (step 1 above). Both
>> vbroadcastss and vfmadd231ps are already implemented in QEMU, but not
>> using ZMM registers.
>>
>> Unfortunately the base AVX512 functionality is large, and therefore
>> the above tasks are all needed to claim support for AVX512. On the
>> other hand, for historical reasons AVX512BW and AVX512VL extensions
>> are separate but in practice they are easier to just implement at the
>> same time as basic AVX512; my expectation is that they would come up
>> almost for free with the rest of the work.
>>
>> Paolo
>>



^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2023-04-12 13:56 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-04-12  9:41 AVX-512 instruction set Walid Ghandour
2023-04-12 12:13 ` Alex Bennée
2023-04-12 13:30   ` Paolo Bonzini
2023-04-12 13:41     ` Walid Ghandour
2023-04-12 13:55       ` Paolo Bonzini

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