From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH v2 2/3] fpu/softfloat: support ARM Alternative half-precision
Date: Fri, 04 May 2018 13:26:09 +0100 [thread overview]
Message-ID: <87y3gz8v4u.fsf@linaro.org> (raw)
In-Reply-To: <9549d686-899d-7b3b-dae3-d3cc22528e50@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> On 05/03/2018 11:17 AM, Peter Maydell wrote:
>> (target/i386 notably does not do this, we should check how
>> SSE and x87 handle NaNs in fp conversions first.)
>
> Hardware does silence NaNs. I tested that earlier:
>
> https://lists.gnu.org/archive/html/qemu-devel/2018-04/msg03114.html
Does that include SSE? I know the hardware will silence NaN's if the
value is ever pushed into an x87 register (as GCC will do when
spilling/filling float).
>
>
> r~
--
Alex Bennée
next prev parent reply other threads:[~2018-05-04 12:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-02 15:43 [Qemu-devel] [PATCH v2 0/3] refactor float-to-float conversions and fix AHP Alex Bennée
2018-05-02 15:43 ` [Qemu-devel] [PATCH v2 1/3] fpu/softfloat: re-factor float to float conversions Alex Bennée
2018-05-02 16:26 ` Richard Henderson
2018-05-02 15:43 ` [Qemu-devel] [PATCH v2 2/3] fpu/softfloat: support ARM Alternative half-precision Alex Bennée
2018-05-03 18:17 ` Peter Maydell
2018-05-03 19:41 ` Alex Bennée
2018-05-03 20:09 ` Richard Henderson
2018-05-04 12:26 ` Alex Bennée [this message]
2018-05-04 15:36 ` Richard Henderson
2018-05-02 15:43 ` [Qemu-devel] [PATCH v2 3/3] tests/tcg/aarch64: add fcvt test cases for AArch64 (!UPSTREAM) Alex Bennée
2018-05-02 15:54 ` [Qemu-devel] [PATCH v2 0/3] refactor float-to-float conversions and fix AHP no-reply
2018-05-02 16:28 ` Richard Henderson
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